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Searched refs:CLK_HCLK_PLL_POSTDIV_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/
Dclk.c44 p_div = ((val & CLK_HCLK_PLL_POSTDIV_MASK) >> 11) + 1; in get_hclk_pll_rate()
/external/u-boot/arch/arm/include/asm/arch-lpc32xx/
Dclk.h105 #define CLK_HCLK_PLL_POSTDIV_MASK (0x3 << 11) macro