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Searched refs:CLK_SRC_TOP2_VAL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dexynos5_setup.h566 #define CLK_SRC_TOP2_VAL ((MUX_GPLL_SEL << 28) \ macro
785 #define CLK_SRC_TOP2_VAL 0x11101000 macro
Dclock_init_exynos5.c737 val |= CLK_SRC_TOP2_VAL; in exynos5250_system_clock_init()
916 writel(CLK_SRC_TOP2_VAL, &clk->src_top2); in exynos5420_system_clock_init()