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Searched refs:CLOCK_ID_PERIPH (Results 1 – 19 of 19) sorted by relevance

/external/u-boot/arch/arm/mach-tegra/tegra20/
Dclock.c588 clock_set_rate(CLOCK_ID_PERIPH, 432, 12, 1, 8); in clock_early_init()
593 clock_set_rate(CLOCK_ID_PERIPH, 432, 26, 1, 8); in clock_early_init()
598 clock_set_rate(CLOCK_ID_PERIPH, 432, 13, 1, 8); in clock_early_init()
753 { PERIPH_ID_SPI1, CLOCK_ID_PERIPH },
754 { PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
755 { PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
756 { PERIPH_ID_SBC3, CLOCK_ID_PERIPH },
757 { PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
758 { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
760 { PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH },
[all …]
/external/u-boot/arch/arm/mach-tegra/tegra114/
Dclock.c735 { PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
736 { PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
737 { PERIPH_ID_SBC3, CLOCK_ID_PERIPH },
738 { PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
739 { PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
740 { PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
741 { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
743 { PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH },
744 { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
745 { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
[all …]
/external/u-boot/arch/arm/mach-tegra/tegra30/
Dclock.c799 { PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
800 { PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
801 { PERIPH_ID_SBC3, CLOCK_ID_PERIPH },
802 { PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
803 { PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
804 { PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
805 { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
807 { PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH },
808 { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
809 { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
[all …]
/external/u-boot/arch/arm/mach-tegra/
Dclock.c564 if (clkid != CLOCK_ID_PERIPH) in clock_get_rate()
608 if (clkid == CLOCK_ID_PERIPH) { in clock_set_rate()
674 struct clk_pll *pll = get_pll(CLOCK_ID_PERIPH); in clock_verify()
691 pll_rate[CLOCK_ID_PERIPH] = clock_get_rate(CLOCK_ID_PERIPH); in clock_init()
703 debug("PLLP = %d\n", pll_rate[CLOCK_ID_PERIPH]); in clock_init()
765 clock_set_rate(CLOCK_ID_PERIPH, 408, 12, 0, 8); in tegra30_set_up_pllp()
770 clock_set_rate(CLOCK_ID_PERIPH, 408, 26, 0, 8); in tegra30_set_up_pllp()
775 clock_set_rate(CLOCK_ID_PERIPH, 408, 13, 0, 8); in tegra30_set_up_pllp()
793 writel(reg, &clkrst->crc_pll[CLOCK_ID_PERIPH].pll_out[0]); in tegra30_set_up_pllp()
799 writel(reg, &clkrst->crc_pll[CLOCK_ID_PERIPH].pll_out[0]); in tegra30_set_up_pllp()
[all …]
/external/u-boot/arch/arm/mach-tegra/tegra210/
Dclock.c944 writel(reg, &clkrst->crc_pll[CLOCK_ID_PERIPH].pll_out[0]); in tegra210_setup_pllp()
948 writel(reg, &clkrst->crc_pll[CLOCK_ID_PERIPH].pll_out[0]); in tegra210_setup_pllp()
953 writel(reg, &clkrst->crc_pll[CLOCK_ID_PERIPH].pll_out[1]); in tegra210_setup_pllp()
959 writel(reg, &clkrst->crc_pll[CLOCK_ID_PERIPH].pll_out[1]); in tegra210_setup_pllp()
1261 { PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
1262 { PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
1263 { PERIPH_ID_SBC3, CLOCK_ID_PERIPH },
1264 { PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
1265 { PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
1266 { PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
[all …]
/external/u-boot/arch/arm/mach-tegra/tegra124/
Dclock.c1161 { PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
1162 { PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
1163 { PERIPH_ID_SBC3, CLOCK_ID_PERIPH },
1164 { PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
1165 { PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
1166 { PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
1167 { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
1169 { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
1170 { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
1171 { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
[all …]
/external/u-boot/drivers/spi/
Dtegra20_slink.c131 clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, in tegra30_spi_probe()
145 clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, in tegra30_spi_claim_bus()
Dtegra20_sflash.c125 clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, in tegra20_sflash_probe()
139 clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, in tegra20_sflash_claim_bus()
Dtegra210_qspi.c134 clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); in tegra210_qspi_probe()
145 clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq); in tegra210_qspi_claim_bus()
Dtegra114_spi.c139 rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, in tegra114_spi_probe()
/external/u-boot/arch/arm/include/asm/arch-tegra20/
Dclock-tables.h17 CLOCK_ID_PERIPH, enumerator
/external/u-boot/arch/arm/include/asm/arch-tegra114/
Dclock-tables.h16 CLOCK_ID_PERIPH, enumerator
/external/u-boot/arch/arm/include/asm/arch-tegra30/
Dclock-tables.h16 CLOCK_ID_PERIPH, enumerator
/external/u-boot/arch/arm/include/asm/arch-tegra124/
Dclock-tables.h17 CLOCK_ID_PERIPH, enumerator
/external/u-boot/arch/arm/include/asm/arch-tegra210/
Dclock-tables.h17 CLOCK_ID_PERIPH, enumerator
/external/u-boot/drivers/mtd/nand/
Dtegra_nand.c859 CLOCK_ID_PERIPH) / 1000000; in setup_timing()
956 clock_start_periph_pll(PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH, 52000000); in tegra_probe()
/external/u-boot/drivers/video/
Dtegra.c278 clock_start_periph_pll(PERIPH_ID_HOST1X, CLOCK_ID_PERIPH, in tegra_display_probe()
/external/u-boot/drivers/video/tegra124/
Ddisplay.c433 clock_start_periph_pll(PERIPH_ID_HOST1X, CLOCK_ID_PERIPH, 408000000); in tegra124_lcd_init()
/external/u-boot/drivers/usb/host/
Dehci-tegra.c595 clock_set_pllout(CLOCK_ID_PERIPH, PLL_OUT4, CONFIG_ULPI_REF_CLK); in init_ulpi_usb_controller()