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Searched refs:CLOCK_ID_XCPU (Results 1 – 11 of 11) sorted by relevance

/external/u-boot/arch/arm/mach-tegra/tegra20/
Dwarmboot_avp.h14 #define SIMPLE_PLLX (CLOCK_ID_XCPU - CLOCK_ID_FIRST_SIMPLE)
/external/u-boot/arch/arm/mach-tegra/
Dcpu.h53 #define SIMPLE_PLLX (CLOCK_ID_XCPU - CLOCK_ID_FIRST_SIMPLE)
Dclock.c694 pll_rate[CLOCK_ID_XCPU] = clock_get_rate(CLOCK_ID_XCPU); in clock_init()
706 debug("PLLX = %d\n", pll_rate[CLOCK_ID_XCPU]); in clock_init()
Dcpu.c173 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in pllx_set_rate()
/external/u-boot/arch/arm/include/asm/arch-tegra20/
Dclock-tables.h24 CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, enumerator
/external/u-boot/arch/arm/include/asm/arch-tegra114/
Dclock-tables.h23 CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, enumerator
/external/u-boot/arch/arm/include/asm/arch-tegra30/
Dclock-tables.h23 CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, enumerator
/external/u-boot/arch/arm/mach-tegra/tegra124/
Dcpu.c47 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in enable_cpu_clocks()
/external/u-boot/arch/arm/mach-tegra/tegra114/
Dcpu.c54 struct clk_pll_info *pllinfo = &tegra_pll_info_table[CLOCK_ID_XCPU]; in enable_cpu_clocks()
/external/u-boot/arch/arm/include/asm/arch-tegra124/
Dclock-tables.h24 CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, enumerator
/external/u-boot/arch/arm/include/asm/arch-tegra210/
Dclock-tables.h24 CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, enumerator