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Searched refs:CMD_MI (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_reg.h28 #define CMD_MI (0x0 << 29) macro
32 #define MI_NOOP (CMD_MI | 0)
34 #define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23)
36 #define MI_FLUSH (CMD_MI | (4 << 23))
40 #define MI_LOAD_REGISTER_IMM (CMD_MI | (0x22 << 23))
42 #define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 2)
45 #define MI_WAIT_FOR_EVENT (CMD_MI | (0x3 << 23))
49 #define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23))
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_defines.h1417 #define CMD_MI (0x0 << 29) macro
1421 #define MI_NOOP (CMD_MI | 0)
1423 #define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23)
1425 #define MI_FLUSH (CMD_MI | (4 << 23))
1429 #define MI_STORE_DATA_IMM (CMD_MI | (0x20 << 23))
1430 #define MI_LOAD_REGISTER_IMM (CMD_MI | (0x22 << 23))
1431 #define MI_LOAD_REGISTER_REG (CMD_MI | (0x2A << 23))
1433 #define MI_FLUSH_DW (CMD_MI | (0x26 << 23))
1435 #define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23))
1440 #define GEN7_MI_LOAD_REGISTER_MEM (CMD_MI | (0x29 << 23))
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