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Searched refs:CONCAT_VECTORS (Results 1 – 25 of 61) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp316 case ISD::CONCAT_VECTORS: in ScalarizeVectorOperand()
425 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; in SplitVectorResult()
598 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size()); in SplitVecRes_CONCAT_VECTORS()
601 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size()); in SplitVecRes_CONCAT_VECTORS()
975 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break; in SplitVectorOperand()
1028 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); in SplitVecOp_UnaryOp()
1184 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes); in SplitVecOp_VSETCC()
1203 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi); in SplitVecOp_FP_ROUND()
1234 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break; in WidenVectorResult()
1435 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl, in WidenVecRes_Binary()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp97 setOperationAction(ISD::CONCAT_VECTORS, T, Custom); in initializeHVXLowering()
131 setOperationAction(ISD::CONCAT_VECTORS, T, Custom); in initializeHVXLowering()
188 setOperationAction(ISD::CONCAT_VECTORS, BoolV, Custom); in initializeHVXLowering()
253 return DAG.getNode(ISD::CONCAT_VECTORS, dl, typeJoin(ty(Ops)), in opJoin()
831 SDValue InLo = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {SubV, V1}); in insertHvxSubvectorReg()
832 SDValue InHi = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {V0, SubV}); in insertHvxSubvectorReg()
878 SDValue InLo = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {SingleV, V1}); in insertHvxSubvectorReg()
879 SDValue InHi = DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, {V0, SingleV}); in insertHvxSubvectorReg()
966 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VecTy, V0, V1); in LowerHvxBuildVector()
1034 SDValue V0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfTy, in LowerHvxConcatVectors()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp472 case ISD::CONCAT_VECTORS: in ScalarizeVectorOperand()
653 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; in SplitVectorResult()
899 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, LoOps); in SplitVecRes_CONCAT_VECTORS()
902 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, HiOps); in SplitVecRes_CONCAT_VECTORS()
1602 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break; in SplitVectorOperand()
1719 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect); in SplitVecOp_VSELECT()
1778 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); in SplitVecOp_UnaryOp()
1875 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), N->getValueType(0), Lo, Hi); in SplitVecOp_ExtVecInRegOp()
1943 SDValue Res = DAG.getNode(ISD::CONCAT_VECTORS, dl, MGT->getValueType(0), Lo, in SplitVecOp_MGATHER()
2187 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo, in SplitVecOp_TruncateHelper()
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DDAGCombiner.cpp1588 case ISD::CONCAT_VECTORS: return visitCONCAT_VECTORS(N); in visit()
7325 assert(LHS.getOpcode() == ISD::CONCAT_VECTORS && in ConvertSelectToConcatVector()
7326 RHS.getOpcode() == ISD::CONCAT_VECTORS && in ConvertSelectToConcatVector()
7366 ISD::CONCAT_VECTORS, DL, VT, in ConvertSelectToConcatVector()
7573 SDValue GatherRes = DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi); in visitMGATHER()
7655 SDValue LoadRes = DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi); in visitMLOAD()
7801 if (N1.getOpcode() == ISD::CONCAT_VECTORS && in visitVSELECT()
7802 N2.getOpcode() == ISD::CONCAT_VECTORS && in visitVSELECT()
8125 SDValue NewValue = DAG.getNode(ISD::CONCAT_VECTORS, DL, DstVT, Loads); in CombineExtLoad()
9543 if (N0.getOpcode() == ISD::CONCAT_VECTORS && !LegalTypes) { in visitTRUNCATE()
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DSelectionDAGDumper.cpp261 case ISD::CONCAT_VECTORS: return "concat_vectors"; in getOperationName()
DSelectionDAG.cpp2313 case ISD::CONCAT_VECTORS: { in computeKnownBits()
3541 case ISD::CONCAT_VECTORS: in ComputeNumSignBits()
3948 case ISD::CONCAT_VECTORS: in getNode()
4439 case ISD::CONCAT_VECTORS: { in getNode()
4620 N1.getOpcode() == ISD::CONCAT_VECTORS && in getNode()
4721 if (N2C && N1.getOpcode() == ISD::CONCAT_VECTORS && in getNode()
4910 case ISD::CONCAT_VECTORS: { in getNode()
6668 case ISD::CONCAT_VECTORS: in getNode()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp446 case ISD::CONCAT_VECTORS: in ScalarizeVectorOperand()
596 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; in SplitVectorResult()
823 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, LoOps); in SplitVecRes_CONCAT_VECTORS()
826 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, HiOps); in SplitVecRes_CONCAT_VECTORS()
1463 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break; in SplitVectorOperand()
1557 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect); in SplitVecOp_VSELECT()
1574 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi); in SplitVecOp_UnaryOp()
1733 SDValue Res = DAG.getNode(ISD::CONCAT_VECTORS, dl, MGT->getValueType(0), Lo, in SplitVecOp_MGATHER()
1977 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo, in SplitVecOp_TruncateHelper()
2005 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes); in SplitVecOp_VSETCC()
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DDAGCombiner.cpp1433 case ISD::CONCAT_VECTORS: return visitCONCAT_VECTORS(N); in visit()
5280 assert(LHS.getOpcode() == ISD::CONCAT_VECTORS && in ConvertSelectToConcatVector()
5281 RHS.getOpcode() == ISD::CONCAT_VECTORS && in ConvertSelectToConcatVector()
5321 ISD::CONCAT_VECTORS, dl, VT, in ConvertSelectToConcatVector()
5532 SDValue GatherRes = DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi); in visitMGATHER()
5616 SDValue LoadRes = DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi); in visitMLOAD()
5689 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi); in visitVSELECT()
5702 if (N1.getOpcode() == ISD::CONCAT_VECTORS && in visitVSELECT()
5703 N2.getOpcode() == ISD::CONCAT_VECTORS && in visitVSELECT()
6000 SDValue NewValue = DAG.getNode(ISD::CONCAT_VECTORS, DL, DstVT, Loads); in CombineExtLoad()
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DSelectionDAGDumper.cpp220 case ISD::CONCAT_VECTORS: return "concat_vectors"; in getOperationName()
/external/llvm/test/CodeGen/X86/
Dwiden_shuffle-1.ll68 ; PR10421: make sure we correctly handle extreme widening with CONCAT_VECTORS
81 ; PR11389: another CONCAT_VECTORS case
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dwiden_shuffle-1.ll88 ; PR10421: make sure we correctly handle extreme widening with CONCAT_VECTORS
109 ; PR11389: another CONCAT_VECTORS case
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h270 CONCAT_VECTORS, enumerator
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h286 CONCAT_VECTORS, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h321 CONCAT_VECTORS, enumerator
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dwiden_shuffle-1.ll50 ; PR10421: make sure we correctly handle extreme widening with CONCAT_VECTORS
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1956 ISD::CONCAT_VECTORS, ISD::VECTOR_SHUFFLE in HexagonTargetLowering()
1983 setOperationAction(ISD::CONCAT_VECTORS, NativeVT, Custom); in HexagonTargetLowering()
1999 setOperationAction(ISD::CONCAT_VECTORS, MVT::v128i8, Custom); in HexagonTargetLowering()
2000 setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i16, Custom); in HexagonTargetLowering()
2001 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i32, Custom); in HexagonTargetLowering()
2002 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i64, Custom); in HexagonTargetLowering()
2004 setOperationAction(ISD::CONCAT_VECTORS, MVT::v256i8, Custom); in HexagonTargetLowering()
2005 setOperationAction(ISD::CONCAT_VECTORS, MVT::v128i16, Custom); in HexagonTargetLowering()
2006 setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i32, Custom); in HexagonTargetLowering()
2007 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i64, Custom); in HexagonTargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp1153 setOperationAction(ISD::CONCAT_VECTORS, VT, Custom); in X86TargetLowering()
1235 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i1, Custom); in X86TargetLowering()
1236 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i1, Custom); in X86TargetLowering()
1237 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i1, Custom); in X86TargetLowering()
1325 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f64, Custom); in X86TargetLowering()
1326 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i64, Custom); in X86TargetLowering()
1327 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16f32, Custom); in X86TargetLowering()
1328 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i32, Custom); in X86TargetLowering()
1503 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i1, Custom); in X86TargetLowering()
1504 setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i1, Custom); in X86TargetLowering()
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/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp1112 setOperationAction(ISD::CONCAT_VECTORS, VT, Custom); in X86TargetLowering()
1288 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f64, Custom); in X86TargetLowering()
1289 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i64, Custom); in X86TargetLowering()
1290 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16f32, Custom); in X86TargetLowering()
1291 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i32, Custom); in X86TargetLowering()
1292 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i1, Custom); in X86TargetLowering()
1432 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i1, Custom); in X86TargetLowering()
1433 setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i1, Custom); in X86TargetLowering()
1434 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i16, Custom); in X86TargetLowering()
1435 setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i8, Custom); in X86TargetLowering()
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DX86IntrinsicsInfo.h376 X86_INTRINSIC_DATA(avx512_kunpck_bw, KUNPCK, ISD::CONCAT_VECTORS, 0),
377 X86_INTRINSIC_DATA(avx512_kunpck_dq, KUNPCK, ISD::CONCAT_VECTORS, 0),
378 X86_INTRINSIC_DATA(avx512_kunpck_wd, KUNPCK, ISD::CONCAT_VECTORS, 0),
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp265 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i32, Custom); in AMDGPUTargetLowering()
266 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f32, Custom); in AMDGPUTargetLowering()
267 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i32, Custom); in AMDGPUTargetLowering()
268 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom); in AMDGPUTargetLowering()
707 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
1106 DAG.getNode(ISD::CONCAT_VECTORS, SL, VT, LoLoad, HiLoad), in SplitVectorLoad()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvector-DAGCombine.ll31 ; Check CONCAT_VECTORS DAG combiner pass doesn't introduce illegal types.
/external/llvm/test/CodeGen/ARM/
Dvector-DAGCombine.ll31 ; Check CONCAT_VECTORS DAG combiner pass doesn't introduce illegal types.
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.cpp844 setOperationAction(ISD::CONCAT_VECTORS, MVT::v2f64, Custom); in X86TargetLowering()
845 setOperationAction(ISD::CONCAT_VECTORS, MVT::v2i64, Custom); in X86TargetLowering()
846 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i8, Custom); in X86TargetLowering()
847 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i16, Custom); in X86TargetLowering()
848 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i32, Custom); in X86TargetLowering()
1004 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f64, Custom); in X86TargetLowering()
1005 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i64, Custom); in X86TargetLowering()
1006 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom); in X86TargetLowering()
1007 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i32, Custom); in X86TargetLowering()
1008 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i8, Custom); in X86TargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp332 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i32, Custom); in AMDGPUTargetLowering()
333 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f32, Custom); in AMDGPUTargetLowering()
334 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i32, Custom); in AMDGPUTargetLowering()
335 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom); in AMDGPUTargetLowering()
1128 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
1394 DAG.getNode(ISD::CONCAT_VECTORS, SL, VT, LoLoad, HiLoad), in SplitVectorLoad()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp568 setTargetDAGCombine(ISD::CONCAT_VECTORS); in AArch64TargetLowering()
787 setOperationAction(ISD::CONCAT_VECTORS, VT, Legal); in addTypeForNEON()
2730 SDValue TruncExt = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v8i16, in LowerTruncateVectorStore()
5798 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6180 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, V0, V1); in tryFormConcatFromShuffle()
6318 V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V1Cst); in GenerateTBL()
6326 V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V2Cst); in GenerateTBL()
6402 } else if (V1.getOpcode() == ISD::CONCAT_VECTORS) { in LowerVECTOR_SHUFFLE()
9283 DAG.getNode(ISD::CONCAT_VECTORS, dl, ConcatTy, in performConcatVectorsCombine()
9847 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi); in performExtendCombine()
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