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Searched refs:CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET (Results 1 – 11 of 11) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc8xxx/
Dsrio.c420 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, in srio_boot_master_release_slave()
436 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, in srio_boot_master_release_slave()
/external/u-boot/drivers/pci/
Dfsl_pci_init.c262 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
267 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
273 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
/external/u-boot/include/configs/
DP2041RDB.h351 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
DT4240QDS.h362 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
Dcorenet_ds.h359 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
DB4860QDS.h512 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
DT208xRDB.h437 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
DT208xQDS.h496 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
DT102xRDB.h139 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
DT102xQDS.h124 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
/external/u-boot/scripts/
Dconfig_whitelist.txt1986 CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET