Searched refs:CONFIG_SYS_DCSRBAR_PHYS (Results 1 – 25 of 40) sorted by relevance
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| /external/u-boot/board/varisys/cyrus/ |
| D | law.c | 20 #ifdef CONFIG_SYS_DCSRBAR_PHYS
22 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 98 #ifdef CONFIG_SYS_DCSRBAR_PHYS
99 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/b4860qds/ |
| D | law.c | 19 #ifdef CONFIG_SYS_DCSRBAR_PHYS
21 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 100 #ifdef CONFIG_SYS_DCSRBAR_PHYS
101 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/t208xrdb/ |
| D | law.c | 24 #ifdef CONFIG_SYS_DCSRBAR_PHYS
26 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 114 #ifdef CONFIG_SYS_DCSRBAR_PHYS
115 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/t4rdb/ |
| D | law.c | 21 #ifdef CONFIG_SYS_DCSRBAR_PHYS
23 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 96 #ifdef CONFIG_SYS_DCSRBAR_PHYS
97 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/t4qds/ |
| D | law.c | 24 #ifdef CONFIG_SYS_DCSRBAR_PHYS
26 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 108 #ifdef CONFIG_SYS_DCSRBAR_PHYS
109 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/t208xqds/ |
| D | law.c | 24 #ifdef CONFIG_SYS_DCSRBAR_PHYS
26 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 114 #ifdef CONFIG_SYS_DCSRBAR_PHYS
115 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/t104xrdb/ |
| D | law.c | 23 #ifdef CONFIG_SYS_DCSRBAR_PHYS
24 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 99 #ifdef CONFIG_SYS_DCSRBAR_PHYS
100 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/t1040qds/ |
| D | law.c | 23 #ifdef CONFIG_SYS_DCSRBAR_PHYS
24 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 84 #ifdef CONFIG_SYS_DCSRBAR_PHYS
85 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/t102xqds/ |
| D | law.c | 23 #ifdef CONFIG_SYS_DCSRBAR_PHYS
24 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 86 #ifdef CONFIG_SYS_DCSRBAR_PHYS
87 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/t102xrdb/ |
| D | law.c | 23 #ifdef CONFIG_SYS_DCSRBAR_PHYS
24 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 86 #ifdef CONFIG_SYS_DCSRBAR_PHYS
87 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/keymile/kmp204x/ |
| D | law.c | 23 #ifdef CONFIG_SYS_DCSRBAR_PHYS
25 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 92 #ifdef CONFIG_SYS_DCSRBAR_PHYS
93 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/board/freescale/common/p_corenet/ |
| D | law.c | 27 #ifdef CONFIG_SYS_DCSRBAR_PHYS
29 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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| D | tlb.c | 133 #ifdef CONFIG_SYS_DCSRBAR_PHYS
134 SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
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| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | fsl_corenet_serdes.c | 263 #ifndef CONFIG_SYS_DCSRBAR_PHYS
264 #define CONFIG_SYS_DCSRBAR_PHYS 0x80000000 /* Must be 1GB-aligned for rev1.0 */ macro
314 struct law_entry law = find_law(CONFIG_SYS_DCSRBAR_PHYS); in enable_bank()
317 law_index = set_next_law(CONFIG_SYS_DCSRBAR_PHYS, in enable_bank()
320 set_law(law.index, CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_1M, in enable_bank()
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