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Searched refs:CONFIG_SYS_DDR_CLK_CNTL (Results 1 – 17 of 17) sorted by relevance

/external/u-boot/include/configs/km/
Dkm8321-common.h77 #define CONFIG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) macro
Dkm8309-common.h112 #define CONFIG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) macro
/external/u-boot/board/freescale/mpc8313erdb/
Dsdram.c72 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
/external/u-boot/board/freescale/mpc832xemds/
Dmpc832xemds.c133 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
/external/u-boot/include/configs/
Dkm8360.h96 #define CONFIG_SYS_DDR_CLK_CNTL (\ macro
DMPC8323ERDB.h117 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
Dve8313.h105 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
Dids8313.h151 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075 macro
DMPC832XEMDS.h127 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
DMPC8349EMDS.h110 #define CONFIG_SYS_DDR_CLK_CNTL 0x02000000 macro
DMPC8313ERDB.h177 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro
/external/u-boot/board/freescale/mpc8323erdb/
Dmpc8323erdb.c111 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
/external/u-boot/board/ids/ids8313/
Dids8313.c91 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CNTL); in fixed_sdram()
/external/u-boot/board/ve8313/
Dve8313.c63 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CNTL); in fixed_sdram()
/external/u-boot/board/freescale/mpc8349emds/
Dmpc8349emds.c112 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; in fixed_sdram()
/external/u-boot/board/keymile/km83xx/
Dkm83xx.c308 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CNTL); in fixed_sdram()
/external/u-boot/scripts/
Dconfig_whitelist.txt2387 CONFIG_SYS_DDR_CLK_CNTL