Searched refs:CONFIG_SYS_DDR_MODE_CONTROL (Results 1 – 14 of 14) sorted by relevance
/external/u-boot/board/freescale/corenet_ds/ |
D | p4080ds_ddr.c | 68 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro 95 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 127 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 159 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 191 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 223 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 255 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 287 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 319 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
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/external/u-boot/board/freescale/bsc9132qds/ |
D | ddr.c | 29 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 56 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
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/external/u-boot/board/freescale/p1010rdb/ |
D | ddr.c | 32 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, 59 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
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/external/u-boot/board/freescale/p1_twr/ |
D | ddr.c | 38 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, in fixed_sdram()
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/external/u-boot/board/Arcturus/ucp1020/ |
D | ddr.c | 98 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, in fixed_sdram()
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/external/u-boot/board/freescale/bsc9131rdb/ |
D | ddr.c | 30 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
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/external/u-boot/include/configs/ |
D | BSC9131RDB.h | 91 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
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D | p1_twr.h | 91 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
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D | UCP1020.h | 163 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
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D | BSC9132QDS.h | 134 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
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D | P1010RDB.h | 231 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
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D | p1_p2_rdb_pc.h | 305 #define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 macro
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/external/u-boot/board/freescale/p1_p2_rdb_pc/ |
D | ddr.c | 230 .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL, in fixed_sdram()
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/external/u-boot/scripts/ |
D | config_whitelist.txt | 2447 CONFIG_SYS_DDR_MODE_CONTROL
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