Home
last modified time | relevance | path

Searched refs:CONFIG_SYS_DDR_TIMING_2_1333 (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/board/freescale/bsc9132qds/
Dspl_minimal.c51 __raw_writel(CONFIG_SYS_DDR_TIMING_2_1333, &ddr->timing_cfg_2); in sdram_init()
Dddr.c51 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_1333,
/external/u-boot/include/configs/
DBSC9132QDS.h164 #define CONFIG_SYS_DDR_TIMING_2_1333 0x0FB8B114 macro
/external/u-boot/scripts/
Dconfig_whitelist.txt2484 CONFIG_SYS_DDR_TIMING_2_1333