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Searched refs:CONFIG_SYS_DDR_TIMING_2_800 (Results 1 – 10 of 10) sorted by relevance

/external/u-boot/board/freescale/corenet_ds/
Dp4080ds_ddr.c39 #define CONFIG_SYS_DDR_TIMING_2_800 0x0fa888cc macro
90 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
122 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
/external/u-boot/board/freescale/bsc9131rdb/
Dspl_minimal.c34 __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, &ddr->timing_cfg_2); in sdram_init()
Dddr.c25 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
/external/u-boot/board/freescale/bsc9132qds/
Dspl_minimal.c31 __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, &ddr->timing_cfg_2); in sdram_init()
Dddr.c24 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
/external/u-boot/include/configs/
DBSC9131RDB.h105 #define CONFIG_SYS_DDR_TIMING_2_800 0x0fa888cf macro
DBSC9132QDS.h154 #define CONFIG_SYS_DDR_TIMING_2_800 0x0FA8C8CF macro
DP1010RDB.h244 #define CONFIG_SYS_DDR_TIMING_2_800 0x0FA888CF macro
/external/u-boot/board/freescale/p1010rdb/
Dddr.c27 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
/external/u-boot/scripts/
Dconfig_whitelist.txt2486 CONFIG_SYS_DDR_TIMING_2_800