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Searched refs:CONFIG_SYS_DDR_TIMING_3_800 (Results 1 – 10 of 10) sorted by relevance

/external/u-boot/board/freescale/corenet_ds/
Dp4080ds_ddr.c36 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
87 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
119 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/external/u-boot/board/freescale/bsc9131rdb/
Dspl_minimal.c31 __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, &ddr->timing_cfg_3); in sdram_init()
Dddr.c22 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/external/u-boot/board/freescale/bsc9132qds/
Dspl_minimal.c28 __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, &ddr->timing_cfg_3); in sdram_init()
Dddr.c21 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/external/u-boot/include/configs/
DBSC9131RDB.h102 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
DBSC9132QDS.h151 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
DP1010RDB.h241 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/external/u-boot/board/freescale/p1010rdb/
Dddr.c24 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/external/u-boot/scripts/
Dconfig_whitelist.txt2493 CONFIG_SYS_DDR_TIMING_3_800