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Searched refs:CONFIG_SYS_I2C_RTC_ADDR (Results 1 – 25 of 58) sorted by relevance

123

/external/u-boot/drivers/rtc/
Dm41t11.c32 #if defined(CONFIG_SYS_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE)
79 i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); in rtc_get()
97 i2c_read(CONFIG_SYS_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, &cent, M41T11_YEAR_SIZE); in rtc_get()
105 i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, &cent, M41T11_YEAR_SIZE); in rtc_get()
150 i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, &cent, M41T11_YEAR_SIZE); in rtc_set()
153 i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); in rtc_set()
162 i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, 1); in rtc_reset()
164 i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, RTC_REG_CNT); in rtc_reset()
166 i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); in rtc_reset()
168 i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); in rtc_reset()
Dds1374.c34 #ifndef CONFIG_SYS_I2C_RTC_ADDR
35 # define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro
199 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); in rtc_read()
205 val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg); in rtc_write()
206 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write()
208 val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg) & ~val; in rtc_write()
209 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write()
215 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write_raw()
Drv3029.c45 ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CLOCK_PAGE, 1, buf, \ in rtc_get()
100 ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CLOCK_PAGE, 1, in rtc_set()
113 (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL1, 1, in set_eere_bit()
121 (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL1, 1, in set_eere_bit()
132 (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_STATUS, in wait_eebusy()
147 (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_RESET, 1, in rtc_reset()
159 (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_EEPROM_CTRL, in rtc_reset()
176 (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, in rtc_reset()
Dm41t60.c23 #if defined(CONFIG_SYS_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE)
64 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { in rtc_dump()
93 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { in rtc_validate()
104 if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_SEC, 1, data, 1)) { in rtc_validate()
140 if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, data, sizeof(data))) { in rtc_validate()
191 if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, data, RTC_REG_CNT)) { in rtc_set()
234 if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_CTRL, 1, data + RTC_CTRL, 1)) { in rtc_reset()
Drs5c372.c43 #ifndef CONFIG_SYS_I2C_RTC_ADDR
44 #define CONFIG_SYS_I2C_RTC_ADDR 0x32 macro
67 ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, len); in rs5c372_readram()
107 ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, RS5C372_RAM_SIZE+1); in rs5c372_enable()
208 ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 1); in rtc_set()
237 ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 8); in rtc_set()
Dm41t62.c58 i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE); in rtc_get()
94 i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE); in rtc_set()
113 if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE)) { in rtc_set()
129 i2c_read(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1); in rtc_reset()
131 i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1); in rtc_reset()
Drx8025.c28 #ifndef CONFIG_SYS_I2C_RTC_ADDR
29 # define CONFIG_SYS_I2C_RTC_ADDR 0x32 macro
86 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 16)) in rtc_get()
172 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 16)) in rtc_reset()
189 if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 2) != 0) in rtc_write()
Dmax6900.c20 #ifndef CONFIG_SYS_I2C_RTC_ADDR
21 #define CONFIG_SYS_I2C_RTC_ADDR 0x50 macro
28 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); in rtc_read()
33 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write()
Drx8010sj.c35 #ifndef CONFIG_SYS_I2C_RTC_ADDR
36 # define CONFIG_SYS_I2C_RTC_ADDR 0x32 macro
315 .chip = CONFIG_SYS_I2C_RTC_ADDR, in rtc_get()
324 .chip = CONFIG_SYS_I2C_RTC_ADDR, in rtc_set()
333 .chip = CONFIG_SYS_I2C_RTC_ADDR, in rtc_reset()
342 .chip = CONFIG_SYS_I2C_RTC_ADDR, in rtc_init()
Dds1307.c66 #ifndef CONFIG_SYS_I2C_RTC_ADDR
67 # define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro
198 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); in rtc_read()
204 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write()
Dpcf8563.c113 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); in rtc_read()
118 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write()
Dpt7c4338.c52 return i2c_reg_read(CONFIG_SYS_I2C_RTC_ADDR, reg); in rtc_read()
57 i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write()
Dx1205.c81 i2c_write(CONFIG_SYS_I2C_RTC_ADDR, reg, 2, &val, 1); in rtc_write()
93 i2c_read(CONFIG_SYS_I2C_RTC_ADDR, X1205_CCR_BASE, 2, buf, 8); in rtc_get()
Dds3231.c161 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); in rtc_read()
167 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write()
Dds1337.c185 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); in rtc_read()
191 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); in rtc_write()
/external/u-boot/board/freescale/mpc8349itx/
Dmpc8349itx.c257 #ifdef CONFIG_SYS_I2C_RTC_ADDR in misc_init_r()
311 #ifdef CONFIG_SYS_I2C_RTC_ADDR in misc_init_r()
314 if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, ds1339_data, sizeof(ds1339_data)) in misc_init_r()
358 (CONFIG_SYS_I2C_RTC_ADDR, 0, 1, ds1339_data, in misc_init_r()
/external/u-boot/drivers/bootcount/
Dbootcount_i2c.c20 ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR, in bootcount_store()
31 ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR, in bootcount_load()
/external/u-boot/include/configs/
Dxpedite520x.h64 CONFIG_SYS_I2C_RTC_ADDR}
192 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro
Dxpedite550x.h81 CONFIG_SYS_I2C_RTC_ADDR}
225 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro
Dtqma6_wru4.h29 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro
Dls2080ardb.h301 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 macro
304 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro
Dpcm052.h65 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro
Daristainetos-common.h185 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro
Dls1012aqds.h58 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ macro
Dmcx.h82 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 macro

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