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Searched refs:CONTROL_LPDDR2IO_3_VAL (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/omap4/
Dhwinit.c59 writel(CONTROL_LPDDR2IO_3_VAL, (*ctrl)->control_lpddr2io1_3); in do_io_settings()
67 writel(CONTROL_LPDDR2IO_3_VAL, (*ctrl)->control_lpddr2io2_3); in do_io_settings()
/external/u-boot/arch/arm/include/asm/arch-omap4/
Domap.h84 #define CONTROL_LPDDR2IO_3_VAL 0xA0888C0F macro
/external/u-boot/arch/arm/include/asm/arch-omap5/
Domap.h115 #define CONTROL_LPDDR2IO_3_VAL 0xA0888C00 macro