Searched refs:COP1 (Results 1 – 8 of 8) sorted by relevance
/external/v8/src/mips/ |
D | assembler-mips.cc | 505 if (opcode == COP1) { in IsMsaBranch() 536 (opcode == COP1 && rs_field == BC1) || // Coprocessor branch. in IsBranch() 537 (opcode == COP1 && rs_field == BC1EQZ) || in IsBranch() 538 (opcode == COP1 && rs_field == BC1NEZ) || IsMsaBranch(instr); in IsBranch() 1453 COP1 | operation | (wt.code() << kWtShift) | (offset16 & kImm16Mask); in GenInstrMsaBranch() 2601 GenInstrRegister(COP1, MTC1, rt, fs, f0); in mtc1() 2606 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1() 2611 GenInstrRegister(COP1, MFC1, rt, fs, f0); in mfc1() 2616 GenInstrRegister(COP1, MFHC1, rt, fs, f0); in mfhc1() 2621 GenInstrRegister(COP1, CTC1, rt, fs); in ctc1() [all …]
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D | constants-mips.h | 447 COP1 = ((2U << 3) + 1) << kOpcodeShift, // Coprocessor 1 class. enumerator 1512 case COP1: in SecondaryValue() 1639 if (this->OpcodeFieldRaw() == COP1) { in IsMSABranchInstr() 1744 case COP1: // Coprocessor instructions. in InstructionType() 1899 case COP1: in IsForbiddenAfterBranchInstr()
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D | disasm-mips.cc | 1576 case COP1: // Coprocessor instructions. in DecodeTypeRegister() 1700 case COP1: in DecodeTypeImmediate()
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D | simulator-mips.cc | 6224 case COP1: in DecodeTypeRegister() 6374 case COP1: in DecodeTypeImmediate()
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/external/v8/src/mips64/ |
D | assembler-mips64.cc | 484 if (opcode == COP1) { in IsMsaBranch() 515 (opcode == COP1 && rs_field == BC1) || // Coprocessor branch. in IsBranch() 516 (opcode == COP1 && rs_field == BC1EQZ) || in IsBranch() 517 (opcode == COP1 && rs_field == BC1NEZ) || IsMsaBranch(instr); in IsBranch() 1417 COP1 | operation | (wt.code() << kWtShift) | (offset16 & kImm16Mask); in GenInstrMsaBranch() 2800 GenInstrRegister(COP1, fmt, ft, fs, fd, MAX); in max() 2808 GenInstrRegister(COP1, fmt, ft, fs, fd, MIN); in min() 2988 GenInstrRegister(COP1, MTC1, rt, fs, f0); in mtc1() 2993 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1() 2998 GenInstrRegister(COP1, DMTC1, rt, fs, f0); in dmtc1() [all …]
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D | constants-mips64.h | 418 COP1 = ((2U << 3) + 1) << kOpcodeShift, // Coprocessor 1 class. enumerator 1569 case COP1: in SecondaryValue() 1696 if (this->OpcodeFieldRaw() == COP1) { in IsMSABranchInstr() 1828 case COP1: // Coprocessor instructions. in InstructionType() 1982 case COP1: in IsForbiddenAfterBranchInstr()
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D | disasm-mips64.cc | 1851 case COP1: // Coprocessor instructions. in DecodeTypeRegister() 2010 case COP1: in DecodeTypeImmediate()
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D | simulator-mips64.cc | 6455 case COP1: in DecodeTypeRegister() 6614 case COP1: in DecodeTypeImmediate()
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