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Searched refs:CORE (Results 1 – 25 of 45) sorted by relevance

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/external/freetype/builds/amiga/
Dsmakefile70 CORE = FT:src/
81 idir=include/ idir=$(CORE) idir=FT:include/ nostackcheck nochkabort\
113 ftbase.o: $(CORE)base/ftbase.c
115 ftinit.o: $(CORE)base/ftinit.c
117 ftsystem.o: $(CORE)base/ftsystem.c
121 ftdebug.o: $(CORE)base/ftdebug.c
128 ftbbox.o: $(CORE)base/ftbbox.c
130 ftbdf.o: $(CORE)base/ftbdf.c
132 ftbitmap.o: $(CORE)base/ftbitmap.c
134 ftcid.o: $(CORE)base/ftcid.c
[all …]
/external/elfutils/tests/
Drun-readelf-mixed-corenote.sh27 CORE 148 PRSTATUS
40 CORE 124 PRPSINFO
44 CORE 144 AUXV
63 CORE 116 FPREGSET
93 CORE 336 PRSTATUS
113 CORE 136 PRPSINFO
117 CORE 304 AUXV
137 CORE 136 FPREGSET
158 CORE 224 PRSTATUS
174 CORE 124 PRPSINFO
[all …]
Drun-readelf-vmcoreinfo.sh26 CORE 336 PRSTATUS
44 CORE 336 PRSTATUS
/external/v8/src/snapshot/
Dnatives.h18 CORE, enumerator
52 typedef NativesCollection<CORE> Natives;
73 DCHECK(type_ == CORE || type_ == EXTRAS); in EncodeForSerialization()
74 intptr_t val = (index_ << 1) | ((type_ == CORE) ? 0 : 1); in EncodeForSerialization()
83 NativeType type = (val & 1) ? EXTRAS : CORE; in DecodeForDeserialization()
Dnatives-external.cc143 if (natives_blob_ && NativesHolder<CORE>::empty()) { in ReadNatives()
145 NativesHolder<CORE>::set(NativesStore::MakeFromScriptsSource(&bytes)); in ReadNatives()
173 NativesHolder<CORE>::Dispose(); in DisposeNatives()
224 INSTANTIATE_TEMPLATES(CORE)
Dnatives-common.cc20 case CORE: in NativesExternalStringResource()
/external/u-boot/doc/
DREADME.mpc85xxcds146 SW3=XX00XXXX == CORE:CCB 2:1
147 XX01XXXX == CORE:CCB 5:2
148 XX10XXXX == CORE:CCB 3:1
149 XX11XXXX == CORE:CCB 7:2
176 SW3=X000XXXX == CORE:CCB 4:1
177 X001XXXX == CORE:CCB 9:2
178 X010XXXX == CORE:CCB 1:1
179 X011XXXX == CORE:CCB 3:2
180 X100XXXX == CORE:CCB 2:1
181 X101XXXX == CORE:CCB 5:2
[all …]
/external/u-boot/board/freescale/mpc8641hpcn/
DREADME24 SW1(1-5) = 01100 CONFIG_SYS_COREPLL = 01000 :: CORE = 2:1
25 01100 :: CORE = 2.5:1
26 10000 :: CORE = 3:1
27 11100 :: CORE = 3.5:1
28 10100 :: CORE = 4:1
29 01110 :: CORE = 4.5:1
/external/u-boot/include/power/
Dtps65910.h12 #define CORE 1 macro
/external/tensorflow/tensorflow/contrib/keras/
DREADME.md2 USE INSTEAD `tensorflow.keras`, PART OF CORE TENSORFLOW.
/external/u-boot/board/siemens/pxm2/
Dboard.c89 #define CORE 1 macro
156 voltage_update(CORE, PMIC_OP_REG_SEL_1_1_3)) { in spl_siemens_board_init()
/external/u-boot/arch/arm/dts/
Domap5-core-thermal.dtsi2 * Device Tree Source for OMAP543x SoC CORE thermal
/external/cldr/tools/java/org/unicode/cldr/tool/
DShowLocaleCoverage.java748 case CORE: in printData()
774 targetLevel.put(Level.CORE, 2 / 100d); in printData()
894 long missingExemplarCount = missingCounter.get(Level.CORE); in printData()
903 …ne = spreadsheetLine(locale, script, language, cldrLocaleLevelGoal, Level.CORE, "ABSENT", path, "«… in printData()
924 foundCounter.add(Level.CORE, coverage.size()); in printData()
925 missingCounter.add(Level.CORE, missing.size()); in printData()
/external/u-boot/arch/arm/cpu/armv7/ls102xa/
Dpsci.S147 @ Enable CORE Soft Reset
167 @ Disable CORE soft reset
/external/cldr/tools/java/org/unicode/cldr/util/
DCoreCoverageInfo.java63 this(Level.CORE); in CoreItems()
68 return name() + (desiredLevel == Level.CORE ? "" : "*"); in toString()
DLevel.java12 UNDETERMINED(0, "none", 0), CORE(10, "G4", 100), enumConstant
/external/google-breakpad/src/third_party/libdisasm/swig/perl/
DMakefile-swig30 PERL_INC = `perl -e 'use Config; print $$Config{archlib};'`/CORE
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/NewGVN/
Dcompleteness.ll293 ; CHECK-NEXT: [[PHIOFOPS1:%.*]] = phi i1 [ true, %entry-block ], [ false, [[CORE:%.*]] ]
294 ; CHECK-NEXT: [[PHIOFOPS:%.*]] = phi i1 [ false, %entry-block ], [ true, [[CORE]] ]
295 ; CHECK-NEXT: [[PHI:%.*]] = phi i8 [ 0, %entry-block ], [ 1, [[CORE]] ]
301 ; CHECK-NEXT: br i1 [[ICMP]], label %busy-wait-phi-0, label [[CORE]]
/external/u-boot/board/vscom/baltos/
Dboard.c211 if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_3)) in am33xx_spl_board_init()
/external/openssh/
DLICENCE80 contributed by CORE SDI S.A. under a BSD-style license.
84 * Copyright (c) 1998 CORE SDI S.A., Buenos Aires, Argentina.
91 * WARRANTIES ARE DISCLAIMED. IN NO EVENT SHALL CORE SDI S.A. BE
/external/v8/
DAndroid.bp203 cmd: "$(location v8_js2c) $(out) CORE $(in)",
/external/u-boot/arch/arm/mach-tegra/tegra210/
Dpinmux.c123 PIN(CORE_PWR_REQ, CORE, RSVD1, RSVD2, RSVD3),
/external/u-boot/board/ti/am335x/
Dboard.c442 if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_0)) in scale_vcores_generic()
/external/u-boot/board/nvidia/p2571/
Dpinmux-config-p2571.h218 PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
/external/u-boot/board/nvidia/p2371-2180/
Dpinmux-config-p2371-2180.h254 PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),

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