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Searched refs:COUNT_HW_RL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_hw_training.h191 #define COUNT_HW_RL 2 macro
Dddr3_read_leveling.c71 reg |= (COUNT_HW_RL << REG_DRAM_TRAINING_RETEST_OFFS); in ddr3_read_leveling_hw()