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Searched refs:CP0_TAGLO (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/mips/lib/
Dcache_init.S222 mtc0 zero, CP0_TAGLO, 4
293 mtc0 zero, CP0_TAGLO
294 mtc0 zero, CP0_TAGLO, 2
/external/u-boot/arch/mips/include/asm/
Dmipsregs.h72 #define CP0_TAGLO $28 macro