Searched refs:CP_REG (Results 1 – 7 of 7) sorted by relevance
/external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
D | fd2_gmem.c | 73 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_INFO)); in emit_gmem2mem_surf() 79 OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL)); in emit_gmem2mem_surf() 95 OUT_RING(ring, CP_REG(REG_A2XX_VGT_MAX_VTX_INDX)); in emit_gmem2mem_surf() 116 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_OFFSET)); in fd2_emit_tile_gmem2mem() 120 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET)); in fd2_emit_tile_gmem2mem() 124 OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL)); in fd2_emit_tile_gmem2mem() 130 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_MASK)); in fd2_emit_tile_gmem2mem() 134 OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTHCONTROL)); in fd2_emit_tile_gmem2mem() 138 OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_SC_MODE_CNTL)); in fd2_emit_tile_gmem2mem() 144 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_SCISSOR_TL)); in fd2_emit_tile_gmem2mem() [all …]
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D | fd2_draw.c | 94 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET)); in fd2_draw_vbo() 98 OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL)); in fd2_draw_vbo() 107 OUT_RING(ring, CP_REG(REG_A2XX_VGT_MAX_VTX_INDX)); in fd2_draw_vbo() 115 OUT_RING(ring, CP_REG(REG_A2XX_UNKNOWN_2010)); in fd2_draw_vbo() 148 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET)); in fd2_clear() 152 OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL)); in fd2_clear() 161 OUT_RING(ring, CP_REG(REG_A2XX_CLEAR_COLOR)); in fd2_clear() 165 OUT_RING(ring, CP_REG(REG_A2XX_A220_RB_LRZ_VSC_CONTROL)); in fd2_clear() 169 OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL)); in fd2_clear() 192 OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTH_CLEAR)); in fd2_clear() [all …]
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D | fd2_emit.c | 200 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_MASK)); in fd2_emit_state() 208 OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTHCONTROL)); in fd2_emit_state() 212 OUT_RING(ring, CP_REG(REG_A2XX_RB_STENCILREFMASK_BF)); in fd2_emit_state() 224 OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_CLIP_CNTL)); in fd2_emit_state() 230 OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_POINT_SIZE)); in fd2_emit_state() 237 OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_VTX_CNTL)); in fd2_emit_state() 249 OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_SCISSOR_TL)); in fd2_emit_state() 263 OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VPORT_XSCALE)); in fd2_emit_state() 272 OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VTE_CNTL)); in fd2_emit_state() 298 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLORCONTROL)); in fd2_emit_state() [all …]
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D | fd2_program.c | 287 OUT_RING(ring, CP_REG(REG_A2XX_SQ_PROGRAM_CNTL)); in fd2_program_emit()
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/external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
D | fd3_query.c | 58 OUT_RING(ring, CP_REG(REG_A3XX_RB_SAMPLE_COUNT_ADDR) | 0x80000000); in occlusion_get_sample()
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/external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
D | fd4_query.c | 65 OUT_RING(ring, CP_REG(REG_A4XX_RB_SAMPLE_COUNT_CONTROL) | 0x80000000); in occlusion_get_sample()
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/external/mesa3d/src/gallium/drivers/freedreno/ |
D | freedreno_util.h | 99 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000)))) macro
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