Searched refs:CR8 (Results 1 – 23 of 23) sorted by relevance
| /external/u-boot/board/renesas/sh7753evb/ |
| D | spi-boot.c | 28 #define CR8 0xFE002040 macro
92 if (spi_read(CR8) & OR12_ADDR32) { in spi_read_flash()
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| /external/llvm/test/CodeGen/X86/ |
| D | ipra-reg-usage.ll | 6 …SW FS GS IP RIP RIZ SS BND0 BND1 BND2 BND3 CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 CR8 CR9 CR10 CR11 CR12 …
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| /external/llvm/test/MC/Disassembler/X86/ |
| D | prefixes.txt | 58 # Test that we can disassembler control registers above CR8
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 533 case X86::CR8: case X86::CR9: case X86::CR10: case X86::CR11: in isX86_64ExtendedReg()
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| D | X86MCTargetDesc.cpp | 211 case X86::CR0: case X86::CR8 : case X86::DR0: return 0; in getX86RegNum()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/ |
| D | prefixes.txt | 94 # Test that we can disassembler control registers above CR8
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 269 ENTRY(CR8)
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 744 case X86::CR8: case X86::CR9: case X86::CR10: case X86::CR11: in isX86_64ExtendedReg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 783 case X86::CR8: case X86::CR9: case X86::CR10: case X86::CR11: in isX86_64ExtendedReg()
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| /external/capstone/arch/X86/ |
| D | X86DisassemblerDecoder.h | 369 ENTRY(CR8) \
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 363 ENTRY(CR8) \
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 363 ENTRY(CR8) \
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 38 CR8 = 19,
267 const unsigned CR8_Overlaps[] = { X86::CR8, 0 };
584 { "CR8", CR8_Overlaps, Empty_SubRegsSet, Empty_SuperRegsSet },
800 …X86::CR0, X86::CR1, X86::CR2, X86::CR3, X86::CR4, X86::CR5, X86::CR6, X86::CR7, X86::CR8, X86::CR9…
1451 RI->mapLLVMRegToDwarfReg(X86::CR8, -1, false );
1612 RI->mapLLVMRegToDwarfReg(X86::CR8, -1, false );
1773 RI->mapLLVMRegToDwarfReg(X86::CR8, -1, false );
1939 RI->mapLLVMRegToDwarfReg(X86::CR8, -1, true );
2100 RI->mapLLVMRegToDwarfReg(X86::CR8, -1, true );
2261 RI->mapLLVMRegToDwarfReg(X86::CR8, -1, true );
[all …]
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| D | X86RegisterInfo.td | 256 def CR8 : Register<"cr8">;
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| D | X86GenAsmWriter.inc | 6690 case X86::CR8:
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| D | X86GenAsmWriter1.inc | 7433 case X86::CR8:
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| D | X86GenAsmMatcher.inc | 2770 case X86::CR8: OpKind = MCK_CONTROL_REG; break;
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 292 def CR8 : X86Reg<"cr8", 8>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 341 def CR8 : X86Reg<"cr8", 8>;
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 97 CR8 = 77,
1135 { X86::CR8 },
1712 …X86::CR0, X86::CR1, X86::CR2, X86::CR3, X86::CR4, X86::CR5, X86::CR6, X86::CR7, X86::CR8, X86::CR9…
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| D | X86GenAsmMatcher.inc | 6277 case X86::CR8: OpKind = MCK_CONTROL_REG; break;
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| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | 7163dfdc1bdcca79cc1bb345a0ba89cd.000afb6b.honggfuzz.cov | 2097 � �A���U�ƶD~蒅^�߀�>����ê�1;�Hp��,8CR8\T ���Ud�����+���X�"�G
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| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 13287 ,"US","CR8","Cresson","Cresson","PA","--3--6--","RQ","1001",,"4027N 07835W",
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