Searched refs:CREG_CORE_IF_CLK_DIV_1 (Results 1 – 1 of 1) sorted by relevance
116 #define CREG_CORE_IF_CLK_DIV_1 0x0 macro472 hsdk_pll_spcwrite(clk, CREG_CORE_IF_DIV, CREG_CORE_IF_CLK_DIV_1); in hsdk_pll_core_update_rate()