Searched refs:CREG_CORE_IF_CLK_DIV_2 (Results 1 – 1 of 1) sorted by relevance
117 #define CREG_CORE_IF_CLK_DIV_2 0x1 macro452 hsdk_pll_spcwrite(clk, CREG_CORE_IF_DIV, CREG_CORE_IF_CLK_DIV_2); in hsdk_pll_core_update_rate()