Searched refs:CR_C (Results 1 – 8 of 8) sorted by relevance
215 if ((cache_bit == CR_C) && !mmu_enabled()) in cache_enable()218 if ((cache_bit == CR_C) && !mpu_enabled()) { in cache_enable()234 if (cache_bit == CR_C) { in cache_disable()236 if ((reg & CR_C) != CR_C) in cache_disable()243 if (cache_bit == (CR_C | CR_M)) in cache_disable()299 cache_enable(CR_C); in dcache_enable()304 cache_disable(CR_C); in dcache_disable()309 return (get_cr() & CR_C) != 0; in dcache_status()
24 orr r0, r0, #(CR_C | CR_M) @ enable MMU and Dcache43 bic r0, r0, #(CR_C | CR_M) @ disable MMU and Dcache75 orr r0, r0, #(CR_C | CR_M) @ MMU and Dcache enable
16 bic r1, r1, #(CR_C | CR_M) @ Disable MMU and Dcache
471 set_sctlr(get_sctlr() | CR_C); in dcache_enable()481 if (!(sctlr & CR_C)) in dcache_disable()484 set_sctlr(sctlr & ~(CR_C|CR_M)); in dcache_disable()492 return (get_sctlr() & CR_C) != 0; in dcache_status()
231 movn x1, #(CR_M | CR_C | CR_I)
15 #define CR_C (1 << 2) /* Dcache enable */ macro291 #define CR_C (1 << 2) /* Dcache enable */ macro
216 set_cr(get_cr() | CR_C); in enable_caches()
262 set_sctlr(get_sctlr() | CR_C); in arch_cpu_init()