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Searched refs:CS6ABCR (Results 1 – 9 of 9) sorted by relevance

/external/u-boot/arch/sh/include/asm/
Dcpu_sh7710.h30 #define CS6ABCR 0xA4FD001C macro
Dcpu_sh7723.h41 #define CS6ABCR 0xFEC1001C macro
Dcpu_sh7724.h42 #define CS6ABCR 0xFEC1001C macro
Dcpu_sh7720.h67 #define CS6ABCR (BSC_BASE + 0x1C) macro
Dcpu_sh7722.h131 #define CS6ABCR 0xFEC1001C macro
/external/u-boot/board/mpr2/
Dmpr2.c42 __raw_writel(0x00000200, CS6ABCR); /* no idle cycles, normal space, 8 bit data bus */ in board_init()
/external/u-boot/board/renesas/ap325rxa/
Dlowlevel_init.S143 CS6ABCR_A: .long CS6ABCR
/external/u-boot/board/ms7722se/
Dlowlevel_init.S186 CS6ABCR_A: .long CS6ABCR ! Ethernet
/external/u-boot/board/renesas/MigoR/
Dlowlevel_init.S154 CS6ABCR_A: .long CS6ABCR