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Searched refs:CSR_ENABLE (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-tegra/tegra124/
Dpsci.c46 writel((2 << CSR_WAIT_WFI_SHIFT) | CSR_ENABLE, &flow->cpu1_csr); in psci_board_init()
47 writel((4 << CSR_WAIT_WFI_SHIFT) | CSR_ENABLE, &flow->cpu2_csr); in psci_board_init()
48 writel((8 << CSR_WAIT_WFI_SHIFT) | CSR_ENABLE, &flow->cpu3_csr); in psci_board_init()
/external/u-boot/arch/arm/mach-tegra/
Dpsci.S25 #define CSR_ENABLE (1 << 0) macro
77 mov r5, #(CSR_ENABLE)
103 mov r5, #(CSR_IMMEDIATE_WAKE | CSR_ENABLE)
/external/u-boot/arch/arm/include/asm/arch-tegra210/
Dflow.h40 #define CSR_ENABLE (1 << 0) macro
/external/u-boot/arch/arm/include/asm/arch-tegra124/
Dflow.h46 #define CSR_ENABLE (1 << 0) macro