/external/boringssl/src/crypto/cipher_extra/test/nist_cavp/ |
D | aes_256_ctr.txt | 1 # Generated by "make_cavp -cipher=aes -extra-labels=Cipher=AES-256-CTR -swap-iv-plaintext kat_aes/C… 5 Cipher: AES-256-CTR 12 Cipher: AES-256-CTR 19 Cipher: AES-256-CTR 26 Cipher: AES-256-CTR 33 Cipher: AES-256-CTR 40 Cipher: AES-256-CTR 47 Cipher: AES-256-CTR 54 Cipher: AES-256-CTR 61 Cipher: AES-256-CTR [all …]
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D | aes_128_ctr.txt | 1 # Generated by "make_cavp -cipher=aes -extra-labels=Cipher=AES-128-CTR -swap-iv-plaintext kat_aes/C… 5 Cipher: AES-128-CTR 12 Cipher: AES-128-CTR 19 Cipher: AES-128-CTR 26 Cipher: AES-128-CTR 33 Cipher: AES-128-CTR 40 Cipher: AES-128-CTR 47 Cipher: AES-128-CTR 54 Cipher: AES-128-CTR 61 Cipher: AES-128-CTR [all …]
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D | aes_192_ctr.txt | 1 # Generated by "make_cavp -cipher=aes -extra-labels=Cipher=AES-192-CTR -swap-iv-plaintext kat_aes/C… 5 Cipher: AES-192-CTR 12 Cipher: AES-192-CTR 19 Cipher: AES-192-CTR 26 Cipher: AES-192-CTR 33 Cipher: AES-192-CTR 40 Cipher: AES-192-CTR 47 Cipher: AES-192-CTR 54 Cipher: AES-192-CTR 61 Cipher: AES-192-CTR [all …]
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/external/tensorflow/tensorflow/compiler/tf2xla/ |
D | xla_op_registry.h | 335 #define REGISTER_XLA_OP_UNIQ(CTR, BUILDER, OP) \ argument 336 static ::tensorflow::XlaOpRegistrar xla_op_registrar__body__##CTR##__object( \ 350 #define REGISTER_XLA_BACKEND_UNIQ(CTR, NAME, ...) \ argument 352 xla_backend_registrar__body__##CTR##__object(NAME, __VA_ARGS__);
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/external/conscrypt/common/src/main/java/org/conscrypt/ |
D | OpenSSLCipher.java | 60 CTR, enumConstant 667 case CTR: in checkSupportedMode() 726 public static class CTR extends AES { class in OpenSSLCipher.EVP_CIPHER.AES 727 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES.CTR 728 super(Mode.CTR, Padding.NOPADDING); in CTR() 787 public static class CTR extends AES_128 { class in OpenSSLCipher.EVP_CIPHER.AES_128 788 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES_128.CTR 789 super(Mode.CTR, Padding.NOPADDING); in CTR() 842 public static class CTR extends AES_256 { class in OpenSSLCipher.EVP_CIPHER.AES_256 843 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES_256.CTR [all …]
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/external/conscrypt/repackaged/common/src/main/java/com/android/org/conscrypt/ |
D | OpenSSLCipher.java | 63 CTR, enumConstant 674 case CTR: in checkSupportedMode() 755 public static class CTR extends AES { class in OpenSSLCipher.EVP_CIPHER.AES 757 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES.CTR 758 super(Mode.CTR, Padding.NOPADDING); in CTR() 852 public static class CTR extends AES_128 { class in OpenSSLCipher.EVP_CIPHER.AES_128 853 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES_128.CTR 854 super(Mode.CTR, Padding.NOPADDING); in CTR() 942 public static class CTR extends AES_256 { class in OpenSSLCipher.EVP_CIPHER.AES_256 943 public CTR() { in CTR() method in OpenSSLCipher.EVP_CIPHER.AES_256.CTR [all …]
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/external/boringssl/src/crypto/cipher_extra/test/ |
D | cipher_tests.txt | 227 Cipher = AES-128-CTR 234 Cipher = AES-128-CTR 241 Cipher = AES-128-CTR 248 Cipher = AES-256-CTR 255 Cipher = AES-256-CTR 262 Cipher = AES-256-CTR 270 Cipher = AES-128-CTR
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/external/boringssl/src/crypto/cipher_extra/asm/ |
D | aes128gcmsiv-x86_64.pl | 1166 my $CTR = "%xmm15"; 1255 vmovdqu ($CT,$LEN), $CTR 1256 vpor OR_MASK(%rip), $CTR, $CTR # CTR = [1]TAG[126...32][00..00] 1265 vmovdqa $CTR, $CTR1 1271 vpaddd two(%rip), $CTR5, $CTR 1339 vmovdqa $CTR, $CTR1 1345 vpaddd two(%rip), $CTR5, $CTR 1509 vmovdqa $CTR, $TMP1 1510 vpaddd one(%rip), $CTR, $CTR
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 504 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 515 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 572 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 586 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 654 else if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in InsertBranch() 669 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in InsertBranch() 697 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in canInsertSelect() 1205 if (Cond[1].getReg() == PPC::CTR8 || Cond[1].getReg() == PPC::CTR) in ReverseBranchCondition() 1284 if (I->definesRegister(PPC::CTR) || I->definesRegister(PPC::CTR8)) in MBBDefinesCTR() 1330 if (Pred[1].getReg() == PPC::CTR8 || Pred[1].getReg() == PPC::CTR) { in PredicateInstruction() [all …]
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D | PPCRegisterInfo.td | 210 def CTR : SPR<9, "ctr">, DwarfRegNum<[-2, 66]>; 349 // The CTR registers are not allocatable because they're used by the 352 def CTRRC : RegisterClass<"PPC", [i32], 32, (add CTR)> {
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D | PPCInstrInfo.td | 1151 let isBranch = 1, isIndirectBranch = 1, Uses = [CTR] in { 1215 let isReturn = 1, Defs = [CTR], Uses = [CTR, LR, RM] in { 1230 let Defs = [CTR], Uses = [CTR] in { 1290 let Uses = [CTR, RM] in { 1321 let Defs = [CTR], Uses = [CTR, RM] in { 1347 let Defs = [CTR], Uses = [CTR, LR, RM] in { 1384 isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR, RM] in 1403 let Defs = [CTR] in 2309 let Uses = [CTR] in { 2314 let Defs = [CTR], Pattern = [(PPCmtctr i32:$rS)] in { [all …]
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D | PPCCTRLoops.cpp | 625 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8)) in clobbersCTR() 628 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8)) in clobbersCTR()
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/external/llvm/test/CodeGen/PowerPC/ |
D | ctrloop-large-ec.ll | 19 ; On PPC32, CTR is also 32 bits, and so cannot hold a 64-bit count.
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | ctrloop-large-ec.ll | 19 ; On PPC32, CTR is also 32 bits, and so cannot hold a 64-bit count.
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D | pr36292.ll | 5 ; No CTR loop due to frem (since it is always a call).
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/external/clang/lib/StaticAnalyzer/Core/ |
D | SVals.cpp | 54 if (const FunctionCodeRegion *CTR = R->getAs<FunctionCodeRegion>()) in getAsFunctionDecl() local 55 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(CTR->getDecl())) in getAsFunctionDecl()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 554 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 565 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 622 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 636 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch() 708 else if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in insertBranch() 725 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in insertBranch() 752 if (Cond[1].getReg() == PPC::CTR || Cond[1].getReg() == PPC::CTR8) in canInsertSelect() 1301 if (Cond[1].getReg() == PPC::CTR8 || Cond[1].getReg() == PPC::CTR) in reverseBranchCondition() 1380 if (I->definesRegister(PPC::CTR) || I->definesRegister(PPC::CTR8)) in MBBDefinesCTR() 1426 if (Pred[1].getReg() == PPC::CTR8 || Pred[1].getReg() == PPC::CTR) { in PredicateInstruction() [all …]
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D | PPCRegisterInfo.td | 218 def CTR : SPR<9, "ctr">, DwarfRegNum<[-2, 66]>; 374 // The CTR registers are not allocatable because they're used by the 377 def CTRRC : RegisterClass<"PPC", [i32], 32, (add CTR)> {
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D | PPCCTRLoops.cpp | 696 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8)) in clobbersCTR() 699 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8)) in clobbersCTR()
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D | PPCInstrInfo.td | 1290 let isBranch = 1, isIndirectBranch = 1, Uses = [CTR] in { 1360 let isReturn = 1, Defs = [CTR], Uses = [CTR, LR, RM] in { 1375 let Defs = [CTR], Uses = [CTR] in { 1435 let Uses = [CTR, RM] in { 1466 let Defs = [CTR], Uses = [CTR, RM] in { 1492 let Defs = [CTR], Uses = [CTR, LR, RM] in { 1529 isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR, RM] in 1548 let Defs = [CTR] in 2550 let Uses = [CTR] in { 2555 let Defs = [CTR], Pattern = [(PPCmtctr i32:$rS)] in { [all …]
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/external/nos/host/android/hals/keymaster/ |
D | proto_utils.cpp | 163 case BlockMode::CTR: in translate_block_mode() 164 return nosapp::BlockMode::CTR; in translate_block_mode() 182 case nosapp::BlockMode::CTR: in translate_block_mode() 183 *out = BlockMode::CTR; in translate_block_mode()
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/external/lzma/DOC/ |
D | Methods.txt | 157 x4 - CTR
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/external/syzkaller/pkg/report/testdata/linux/report/ |
D | 208 | 100 [ 64.157778] DRBG: could not allocate CTR cipher TFM handle: ctr(aes) 286 [ 65.014255] DRBG: could not allocate CTR cipher TFM handle: ctr(aes)
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/external/conscrypt/srcgen/ |
D | intra-core-api.txt | 26 method:com.android.org.conscrypt.OpenSSLCipher$EVP_CIPHER$AES$CTR#CTR() 122 type:com.android.org.conscrypt.OpenSSLCipher$EVP_CIPHER$AES$CTR
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/external/conscrypt/ |
D | CAPABILITIES.md | 89 * `AES/CTR/NoPadding`
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