/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | f16-instructions.ll | 1 …alse -disable-post-ra -disable-fp-elim | FileCheck %s --check-prefix=CHECK-CVT --check-prefix=CHEC… 6 ; CHECK-CVT-LABEL: test_fadd: 7 ; CHECK-CVT-NEXT: fcvt s1, h1 8 ; CHECK-CVT-NEXT: fcvt s0, h0 9 ; CHECK-CVT-NEXT: fadd s0, s0, s1 10 ; CHECK-CVT-NEXT: fcvt h0, s0 11 ; CHECK-CVT-NEXT: ret 22 ; CHECK-CVT-LABEL: test_fsub: 23 ; CHECK-CVT-NEXT: fcvt s1, h1 24 ; CHECK-CVT-NEXT: fcvt s0, h0 [all …]
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D | fp16-v4-instructions.ll | 1 …ple=aarch64-none-eabi -mattr=-fullfp16 | FileCheck %s --check-prefix=CHECK-CVT --check-prefix=CHEC… 6 ; CHECK-CVT-LABEL: add_h: 7 ; CHECK-CVT-DAG: fcvtl [[OP1:v[0-9]+\.4s]], v0.4h 8 ; CHECK-CVT-DAG: fcvtl [[OP2:v[0-9]+\.4s]], v1.4h 9 ; CHECK-CVT-NEXT: fadd [[RES:v[0-9]+.4s]], [[OP1]], [[OP2]] 10 ; CHECK-CVT-NEXT: fcvtn v0.4h, [[RES]] 31 ; CHECK-CVT-LABEL: sub_h: 32 ; CHECK-CVT-DAG: fcvtl [[OP1:v[0-9]+\.4s]], v0.4h 33 ; CHECK-CVT-DAG: fcvtl [[OP2:v[0-9]+\.4s]], v1.4h 34 ; CHECK-CVT-NEXT: fsub [[RES:v[0-9]+.4s]], [[OP1]], [[OP2]] [all …]
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D | fp16-v8-instructions.ll | 1 …fullfp16 | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK-CVT --check-prefix=CH… 6 ; CHECK-CVT-LABEL: add_h: 7 ; CHECK-CVT: fcvt 8 ; CHECK-CVT: fcvt 9 ; CHECK-CVT-DAG: fadd 10 ; CHECK-CVT-DAG: fcvt 11 ; CHECK-CVT-DAG: fcvt 12 ; CHECK-CVT-DAG: fadd 13 ; CHECK-CVT-DAG: fcvt 14 ; CHECK-CVT-DAG: fcvt [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/CodeView/ |
D | SimpleTypeSerializer.cpp | 35 CVType CVT; in serialize() local 36 CVT.Type = static_cast<TypeLeafKind>(Record.getKind()); in serialize() 38 writeRecordPrefix(Writer, CVT.Type); in serialize() 40 cantFail(Mapping.visitTypeBegin(CVT)); in serialize() 41 cantFail(Mapping.visitKnownRecord(CVT, Record)); in serialize() 42 cantFail(Mapping.visitTypeEnd(CVT)); in serialize() 48 Prefix->RecordKind = CVT.kind(); in serialize()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/DebugInfo/CodeView/ |
D | TypeDeserializer.h | 43 template <typename T> static Error deserializeAs(CVType &CVT, T &Record) { in deserializeAs() argument 44 Record.Kind = static_cast<TypeRecordKind>(CVT.kind()); in deserializeAs() 45 MappingInfo I(CVT.content()); in deserializeAs() 46 if (auto EC = I.Mapping.visitTypeBegin(CVT)) in deserializeAs() 48 if (auto EC = I.Mapping.visitKnownRecord(CVT, Record)) in deserializeAs() 50 if (auto EC = I.Mapping.visitTypeEnd(CVT)) in deserializeAs() 62 CVType CVT(static_cast<TypeLeafKind>(K), Data); in deserializeAs() 63 if (auto EC = deserializeAs<T>(CVT, Record)) in deserializeAs()
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/external/clang/test/Sema/ |
D | deref.c | 37 typedef const void CVT; typedef 38 extern CVT cv3;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | fpext.f16.ll | 136 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[A]] 137 ; GFX89-DAG: v_cvt_f32_f16_e64 [[CVT:v[0-9]+]], -[[A]] 139 ; GCN: store_dword [[CVT]] 182 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[A]] 183 ; GFX89-DAG: v_cvt_f32_f16_e64 [[CVT:v[0-9]+]], |[[A]]| 185 ; GCN: store_dword [[CVT]] 228 ; SI: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[OR]] 229 ; GFX89-DAG: v_cvt_f32_f16_e64 [[CVT:v[0-9]+]], -|[[OR]]| 231 ; GCN: buffer_store_dword [[CVT]]
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D | br_cc.f16.ll | 15 ; SI: v_cvt_f16_f32_e32 v[[CVT:[0-9]+]], v[[A_F32]] 18 ; SI: v_cvt_f16_f32_e32 v[[CVT]], v[[B_F32]] 21 ; SI: buffer_store_short v[[CVT]]
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D | widen-smrd-loads.ll | 59 ; SI: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[VAL]] 60 ; SI: v_add_f32_e32 [[ADD:v[0-9]+]], 4.0, [[CVT]]
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D | half.ll | 254 ; GCN: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[LOAD]] 255 ; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[CVT]] 445 ; GCN: v_cvt_f16_f32_e32 [[CVT:v[0-9]+]], [[LOAD]] 446 ; GCN: flat_store_short v{{\[[0-9]+:[0-9]+\]}}, [[CVT]]
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D | clamp-modifier.ll | 106 ; SI: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[A]] 107 ; SI: v_add_f32_e64 [[ADD:v[0-9]+]], [[CVT]], 1.0 clamp{{$}} 126 ; SI: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[A]] 127 ; SI: v_add_f32_e64 [[ADD:v[0-9]+]], [[CVT]], 1.0 clamp{{$}}
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/external/libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.observers/ |
D | get.pass.cpp | 25 typedef const VT CVT; in test_basic() typedef 37 typedef std::unique_ptr<CVT> U; in test_basic()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86SelectionDAGInfo.cpp | 146 EVT CVT = Count.getValueType(); in EmitTargetCodeForMemset() local 147 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count, in EmitTargetCodeForMemset() 148 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT)); in EmitTargetCodeForMemset() 149 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX : in EmitTargetCodeForMemset()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/PDB/Native/ |
D | NativeEnumSymbol.cpp | 23 const codeview::CVType &CVT) in NativeEnumSymbol() argument 24 : NativeRawSymbol(Session, Id), CV(CVT), in NativeEnumSymbol()
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/external/llvm/lib/Target/X86/ |
D | X86SelectionDAGInfo.cpp | 167 EVT CVT = Count.getValueType(); in EmitTargetCodeForMemset() local 168 SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count, in EmitTargetCodeForMemset() 170 CVT)); in EmitTargetCodeForMemset() 171 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
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D | X86SchedHaswell.td | 1818 // CVT(T)PD2DQ. 1820 def : InstRW<[WriteP1_P5_Lat4], (instregex "(V?)CVT(T?)PD2DQrr")>; 1822 def : InstRW<[WriteP1_P5_Lat4Ld], (instregex "(V?)CVT(T?)PD2DQrm")>; 1828 // CVT(T)PS2PI. 1836 // CVT(T)PD2PI. 1842 def : InstRW<[WriteP1_P5_Lat4], (instregex "(Int_)?(V?)CVT(T?)SI2SS(64)?rr")>; 1844 // CVT(T)SS2SI. 1846 def : InstRW<[WriteP0_P1_Lat4], (instregex "(Int_)?(V?)CVT(T?)SS2SI(64)?rr")>; 1848 def : InstRW<[WriteP0_P1_Lat4Ld], (instregex "(Int_)?(V?)CVT(T?)SS2SI(64)?rm")>; 1856 def : InstRW<[WriteP0_P1_Lat4], (instregex "(Int_)?(V?)CVT(T?)SD2SI(64)?rr")>; [all …]
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/external/pdfium/core/fxcodec/codec/ |
D | ccodec_tiffmodule.cpp | 332 #define CVT(x) ((uint16_t)((x) >> 8)) in SetPalette() macro 333 red_orig[i] = CVT(red_orig[i]); in SetPalette() 334 green_orig[i] = CVT(green_orig[i]); in SetPalette() 335 blue_orig[i] = CVT(blue_orig[i]); in SetPalette() 336 #undef CVT in SetPalette()
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_from_tgsi.cpp | 811 NV50_IR_OPCODE_CASE(ROUND, CVT); in translateOpcode() 844 NV50_IR_OPCODE_CASE(I2F, CVT); in translateOpcode() 865 NV50_IR_OPCODE_CASE(F2I, CVT); in translateOpcode() 878 NV50_IR_OPCODE_CASE(F2U, CVT); in translateOpcode() 879 NV50_IR_OPCODE_CASE(U2F, CVT); in translateOpcode() 908 NV50_IR_OPCODE_CASE(D2I, CVT); in translateOpcode() 909 NV50_IR_OPCODE_CASE(D2U, CVT); in translateOpcode() 910 NV50_IR_OPCODE_CASE(I2D, CVT); in translateOpcode() 911 NV50_IR_OPCODE_CASE(U2D, CVT); in translateOpcode() 916 NV50_IR_OPCODE_CASE(DROUND, CVT); in translateOpcode() [all …]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | half.ll | 8 ; GCN: v_cvt_f16_f32_e32 [[CVT:v[0-9]+]], [[ARG]] 9 ; GCN: buffer_store_short [[CVT]] 271 ; GCN: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[LOAD]] 272 ; GCN: buffer_store_dword [[CVT]] 429 ; GCN: v_cvt_f16_f32_e32 [[CVT:v[0-9]+]], [[LOAD]] 430 ; GCN: buffer_store_short [[CVT]]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ScheduleZnver1.td | 1287 // CVT(T)PD2DQ. 1289 def : InstRW<[ZnWriteCVTDQ2PDr], (instregex "(V?)CVT(T?)PD2DQrr")>; 1296 def : InstRW<[ZnWriteCVTPD2DQLd], (instregex "(V?)CVT(T?)PD2DQrm")>; 1306 // CVT(T)PS2PI. 1314 // CVT(T)PD2PI. 1323 // CVT(T)SS2SI. 1325 def : InstRW<[ZnWriteCVTPD2DQr], (instregex "(V?)CVT(T?)SS2SI(64)?rr")>; 1328 def : InstRW<[ZnWriteCVTPD2DQLd], (instregex "(V?)CVT(T?)SS2SI(64)?rm")>; 1346 def : InstRW<[ZnWriteCVSTSI2SIr], (instregex "(V?)CVT(T?)SD2SI(64)?rr")>; 1348 def : InstRW<[ZnWriteCVSTSI2SILd], (instregex "(V?)CVT(T?)SD2SI(64)?rm")>;
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D | X86SchedBroadwell.td | 828 def: InstRW<[BWWriteResGroup39], (instregex "(V?)CVT(T?)SD2SI64rr", 829 "(V?)CVT(T?)SD2SIrr", 830 "(V?)CVT(T?)SS2SI64rr", 831 "(V?)CVT(T?)SS2SIrr")>; 862 "(V?)CVT(T?)PD2DQrr")>; 1263 "(V?)CVT(T?)SD2SI64rm", 1264 "(V?)CVT(T?)SD2SIrm", 1282 "CVT(T?)PD2DQrm",
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/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | DAGISelMatcher.cpp | 386 if (const CheckValueTypeMatcher *CVT = dyn_cast<CheckValueTypeMatcher>(M)) in isContradictoryImpl() local 387 return CVT->getTypeName() != getTypeName(); in isContradictoryImpl()
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/external/llvm/utils/TableGen/ |
D | DAGISelMatcher.cpp | 387 if (const CheckValueTypeMatcher *CVT = dyn_cast<CheckValueTypeMatcher>(M)) in isContradictoryImpl() local 388 return CVT->getTypeName() != getTypeName(); in isContradictoryImpl()
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
D | DAGISelMatcher.cpp | 405 if (const CheckValueTypeMatcher *CVT = dyn_cast<CheckValueTypeMatcher>(M)) in isContradictoryImpl() local 406 return CVT->getTypeName() != getTypeName(); in isContradictoryImpl()
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/external/harfbuzz_ng/test/shaping/data/text-rendering-tests/fonts/ |
D | Selawik-README.md | 60 …CVT-based stem hints to the lowercase only. This provided the need to vary CVTs and thus require a…
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