Searched refs:CVT_L_D (Results 1 – 10 of 10) sorted by relevance
| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 386 CVT_L_D = 4, enumerator
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| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 353 CVT_L_D = 4, enumerator
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| /external/v8/src/mips/ |
| D | constants-mips.h | 654 CVT_L_D = ((4U << 3) + 5), enumerator
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| D | disasm-mips.cc | 1093 case CVT_L_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips.cc | 2967 GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D); in cvt_l_d()
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| D | simulator-mips.cc | 2912 case CVT_L_D: { // Mips32r2: Truncate double to 64-bit long-word. in DecodeTypeRegisterDRsType()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 684 CVT_L_D = ((4U << 3) + 5), enumerator
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| D | disasm-mips64.cc | 1166 case CVT_L_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips64.cc | 3355 GenInstrRegister(COP1, D, f0, fs, fd, CVT_L_D); in cvt_l_d()
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| D | simulator-mips64.cc | 3231 case CVT_L_D: { // Mips64r2: Truncate double to 64-bit long-word. in DecodeTypeRegisterDRsType()
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