Searched refs:CVT_S_D (Results 1 – 10 of 10) sorted by relevance
| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 348 CVT_S_D = 4, enumerator
687 int CvtSUwLatency() { return CvtDUwLatency() + Latency::CVT_S_D; } in CvtSUwLatency()
1701 return Latency::CVT_S_D; in GetInstructionLatency()
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| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 381 CVT_S_D = 4, enumerator
1484 return Latency::CVT_S_D; in GetInstructionLatency()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 652 CVT_S_D = ((4U << 3) + 0), enumerator
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| D | disasm-mips.cc | 1123 case CVT_S_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips.cc | 3124 GenInstrRegister(COP1, D, f0, fs, fd, CVT_S_D); in cvt_s_d()
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| D | simulator-mips.cc | 2909 case CVT_S_D: // Convert double to float (single). in DecodeTypeRegisterDRsType()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 682 CVT_S_D = ((4U << 3) + 0), enumerator
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| D | disasm-mips64.cc | 1196 case CVT_S_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips64.cc | 3441 GenInstrRegister(COP1, D, f0, fs, fd, CVT_S_D); in cvt_s_d()
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| D | simulator-mips64.cc | 3228 case CVT_S_D: // Convert double to float (single). in DecodeTypeRegisterDRsType()
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