| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1992 MVT CastVT = in LowerVectorINT_TO_FP() local
1995 In = DAG.getNode(Op.getOpcode(), dl, CastVT, In); in LowerVectorINT_TO_FP()
2002 EVT CastVT = VT.changeVectorElementTypeToInteger(); in LowerVectorINT_TO_FP() local
2003 In = DAG.getNode(CastOpc, dl, CastVT, In); in LowerVectorINT_TO_FP()
5386 EVT CastVT = EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(), in tryFormConcatFromShuffle() local
5389 V0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V0, in tryFormConcatFromShuffle()
5393 V1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V1, in tryFormConcatFromShuffle()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2317 MVT CastVT = in LowerVectorINT_TO_FP() local
2320 In = DAG.getNode(Op.getOpcode(), dl, CastVT, In); in LowerVectorINT_TO_FP()
2327 EVT CastVT = VT.changeVectorElementTypeToInteger(); in LowerVectorINT_TO_FP() local
2328 In = DAG.getNode(CastOpc, dl, CastVT, In); in LowerVectorINT_TO_FP()
6170 EVT CastVT = EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(), in tryFormConcatFromShuffle() local
6173 V0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V0, in tryFormConcatFromShuffle()
6177 V1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V1, in tryFormConcatFromShuffle()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15222 MVT CastVT = MVT::getVectorVT(MVT::i8, VT.getVectorNumElements() * 2); in LowerVSELECT() local
15223 SDValue Cond = DAG.getBitcast(CastVT, Op->getOperand(0)); in LowerVSELECT()
15224 SDValue LHS = DAG.getBitcast(CastVT, Op->getOperand(1)); in LowerVSELECT()
15225 SDValue RHS = DAG.getBitcast(CastVT, Op->getOperand(2)); in LowerVSELECT()
15226 SDValue Select = DAG.getNode(ISD::VSELECT, dl, CastVT, Cond, LHS, RHS); in LowerVSELECT()
15327 MVT CastVT = MVT::getIntegerVT(VecVT.getVectorNumElements()); in ExtractBitFromMaskVector() local
15328 return DAG.getAnyExtOrTrunc(DAG.getBitcast(CastVT, Vec), dl, EltVT); in ExtractBitFromMaskVector()
24352 EVT CastVT = MVT::getVectorVT(DstVT.getVectorElementType(), in LowerBITCAST() local
24354 Lo = DAG.getBitcast(CastVT, Lo); in LowerBITCAST()
24355 Hi = DAG.getBitcast(CastVT, Hi); in LowerBITCAST()
[all …]
|
| D | X86InstrAVX512.td | 1819 X86VectorVTInfo CastVT> {
1822 … (IdxVT.VT (bitconvert (CastVT.VT _.RC:$src1))), _.RC:$src3),
1823 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
1828 (IdxVT.VT (bitconvert (CastVT.VT _.RC:$src1))),
1830 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
1835 (IdxVT.VT (bitconvert (CastVT.VT _.RC:$src1))),
1837 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 4535 MVT CastVT = Subtarget.hasAVX2() ? MVT::v8i32 : MVT::v8f32; in insert128BitVector() local
4538 Result = DAG.getBitcast(CastVT, Result); in insert128BitVector()
4539 Vec256 = DAG.getBitcast(CastVT, Vec256); in insert128BitVector()
4540 Vec256 = DAG.getNode(X86ISD::BLENDI, dl, CastVT, Result, Vec256, Mask); in insert128BitVector()
20163 MVT CastVT = MVT::v4i32; in LowerShift() local
20171 CastVT = MVT::v2i64; in LowerShift()
20172 SDValue BitCast1 = DAG.getBitcast(CastVT, Shift1); in LowerShift()
20173 SDValue BitCast2 = DAG.getBitcast(CastVT, Shift2); in LowerShift()
20174 SDValue Result = getTargetShuffleNode(TargetOpcode, dl, CastVT, BitCast2, in LowerShift()
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