| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 125 for (unsigned Chan = 0; Chan < 4; ++Chan) { in runOnMachineFunction() local
128 if (Chan < 2) in runOnMachineFunction()
129 DstReg = MI.getOperand(Chan).getReg(); in runOnMachineFunction()
131 DstReg = Chan == 2 ? AMDGPU::T0_Z : AMDGPU::T0_W; in runOnMachineFunction()
134 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg); in runOnMachineFunction()
136 if (Chan > 0) { in runOnMachineFunction()
139 if (Chan >= 2) in runOnMachineFunction()
141 if (Chan != 3) in runOnMachineFunction()
154 for (unsigned Chan = 0; Chan < 4; ++Chan) { in runOnMachineFunction() local
157 if (Chan < 2) in runOnMachineFunction()
[all …]
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| D | R600RegisterInfo.td | 45 foreach Chan = [ "X", "Y", "Z", "W" ] in {
47 def T#Index#_#Chan : R600RegWithChan <"T"#Index#"."#Chan, Index, Chan>;
50 def Addr#Index#_#Chan : R600RegWithChan <"T("#Index#" + AR.x)."#Chan,
51 Index, Chan>;
67 foreach Chan = [ "X", "Y", "Z", "W"] in {
69 let chan_encoding = !if(!eq(Chan, "X"), 0,
70 !if(!eq(Chan, "Y"), 1,
71 !if(!eq(Chan, "Z"), 2,
72 !if(!eq(Chan, "W"), 3, 0)))) in {
73 def V0123_#Chan : R600Reg_128 <"V0123_"#Chan,
[all …]
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| D | R600OptimizeVectorRegisters.cpp | 72 unsigned Chan = Instr->getOperand(i + 1).getImm(); in RegSeqInfo() local
74 UndefReg.push_back(Chan); in RegSeqInfo()
76 RegToChan[MO.getReg()] = Chan; in RegSeqInfo()
171 unsigned Chan) { in getReassignedChan() argument
173 if (RemapChan[j].first == Chan) in getReassignedChan()
195 unsigned Chan = getReassignedChan(RemapChan, Swizzle); in RebuildVector() local
201 .addImm(Chan); in RebuildVector()
202 UpdatedRegToChan[SubReg] = Chan; in RebuildVector()
204 std::find(UpdatedUndef.begin(), UpdatedUndef.end(), Chan); in RebuildVector()
207 assert(std::find(UpdatedUndef.begin(), UpdatedUndef.end(), Chan) == in RebuildVector()
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| D | R600MachineScheduler.cpp | 439 for (int Chan = 3; Chan > -1; --Chan) { in pickAlu() local
440 bool isOccupied = OccupedSlotsMask & (1 << Chan); in pickAlu()
442 SUnit *SU = AttemptFillSlot(Chan, false); in pickAlu()
444 OccupedSlotsMask |= (1 << Chan); in pickAlu()
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| D | R600EmitClauseMarkers.cpp | 135 unsigned Chan = Sel & 3, Index = ((Sel >> 2) - 512) & 31; in SubstituteKCacheBank() local
136 unsigned KCacheIndex = Index * 4 + Chan; in SubstituteKCacheBank()
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| D | R600InstrInfo.cpp | 373 unsigned Chan = RI.getHWRegChan(Reg); in ExtractSrcs() local
374 Result.push_back(std::make_pair(Index, Chan)); in ExtractSrcs()
639 unsigned Chan = RI.getHWRegChan(Src.first->getReg()); in fitsConstReadLimitations() local
640 Consts.push_back((Index << 2) | Chan); in fitsConstReadLimitations()
1122 for (unsigned Chan = 0; Chan < StackWidth; ++Chan) { in reserveIndirectRegisters() local
1123 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister((4 * Index) + Chan); in reserveIndirectRegisters()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600RegisterInfo.td | 45 foreach Chan = [ "X", "Y", "Z", "W" ] in {
47 def T#Index#_#Chan : R600RegWithChan <"T"#Index#"."#Chan, Index, Chan>;
50 def Addr#Index#_#Chan : R600RegWithChan <"T("#Index#" + AR.x)."#Chan,
51 Index, Chan>;
67 foreach Chan = [ "X", "Y", "Z", "W"] in {
69 let chan_encoding = !if(!eq(Chan, "X"), 0,
70 !if(!eq(Chan, "Y"), 1,
71 !if(!eq(Chan, "Z"), 2,
72 !if(!eq(Chan, "W"), 3, 0)))) in {
73 def V0123_#Chan : R600Reg_128 <"V0123_"#Chan,
[all …]
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| D | R600ExpandSpecialInstrs.cpp | 142 for (unsigned Chan = 0; Chan < 4; ++Chan) { in runOnMachineFunction() local
143 bool Mask = (Chan != TRI.getHWRegChan(DstReg)); in runOnMachineFunction()
145 R600::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction()
147 TII->buildSlotOfVectorInstruction(MBB, &MI, Chan, SubDstReg); in runOnMachineFunction()
148 if (Chan > 0) { in runOnMachineFunction()
154 if (Chan != 3) in runOnMachineFunction()
208 for (unsigned Chan = 0; Chan < 4; Chan++) { in runOnMachineFunction() local
223 unsigned SubRegIndex = AMDGPURegisterInfo::getSubRegFromChannel(Chan); in runOnMachineFunction()
228 unsigned SubRegIndex0 = AMDGPURegisterInfo::getSubRegFromChannel(CubeSrcSwz[Chan]); in runOnMachineFunction()
229 unsigned SubRegIndex1 = AMDGPURegisterInfo::getSubRegFromChannel(CubeSrcSwz[3 - Chan]); in runOnMachineFunction()
[all …]
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| D | R600OptimizeVectorRegisters.cpp | 85 unsigned Chan = Instr->getOperand(i + 1).getImm(); in RegSeqInfo() local
87 UndefReg.push_back(Chan); in RegSeqInfo()
89 RegToChan[MO.getReg()] = Chan; in RegSeqInfo()
195 unsigned Chan) { in getReassignedChan() argument
197 if (RemapChan[j].first == Chan) in getReassignedChan()
219 unsigned Chan = getReassignedChan(RemapChan, Swizzle); in RebuildVector() local
225 .addImm(Chan); in RebuildVector()
226 UpdatedRegToChan[SubReg] = Chan; in RebuildVector()
227 std::vector<unsigned>::iterator ChanPos = llvm::find(UpdatedUndef, Chan); in RebuildVector()
230 assert(!is_contained(UpdatedUndef, Chan) && in RebuildVector()
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| D | R600MachineScheduler.cpp | 438 for (int Chan = 3; Chan > -1; --Chan) { in pickAlu() local
439 bool isOccupied = OccupedSlotsMask & (1 << Chan); in pickAlu()
441 SUnit *SU = AttemptFillSlot(Chan, false); in pickAlu()
443 OccupedSlotsMask |= (1 << Chan); in pickAlu()
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| D | R600InstrInfo.cpp | 367 unsigned Chan = RI.getHWRegChan(Reg); in ExtractSrcs() local
368 Result.push_back(std::make_pair(Index, Chan)); in ExtractSrcs()
628 unsigned Chan = RI.getHWRegChan(Src.first->getReg()); in fitsConstReadLimitations() local
629 Consts.push_back((Index << 2) | Chan); in fitsConstReadLimitations()
1103 for (unsigned Chan = 0; Chan < StackWidth; ++Chan) { in reserveIndirectRegisters() local
1104 unsigned Reg = R600::R600_TReg32RegClass.getRegister((4 * Index) + Chan); in reserveIndirectRegisters()
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| D | R600EmitClauseMarkers.cpp | 147 unsigned Chan = Sel & 3, Index = ((Sel >> 2) - 512) & 31; in SubstituteKCacheBank() local
148 unsigned KCacheIndex = Index * 4 + Chan; in SubstituteKCacheBank()
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| /external/syzkaller/vendor/github.com/google/go-cmp/cmp/internal/value/ |
| D | format.go | 70 case reflect.UnsafePointer, reflect.Chan, reflect.Func:
235 case reflect.Chan, reflect.Func, reflect.Interface, reflect.Ptr, reflect.Map, reflect.Slice:
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| D | sort.go | 61 case reflect.Ptr, reflect.UnsafePointer, reflect.Chan:
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| /external/libusb/ |
| D | AUTHORS | 42 Hoi-Ho Chan
|
| /external/icu/icu4c/source/data/curr/ |
| D | vai_Latn.txt | 44 "Chaníĩ Yuwaŋ Rɛŋmimbi",
|
| /external/u-boot/arch/arm/dts/ |
| D | zynqmp-zcu100-revC.dts | 8 * Nathalie Chan King Choy
|
| /external/ImageMagick/ |
| D | AUTHORS.txt | 38 Siu Chi Chan
|
| /external/squashfs-tools/ |
| D | ACKNOWLEDGEMENTS | 26 Thanks to Chan Jeong <chan.jeong@lge.com> and LG for the patches to support LZO
|
| /external/syzkaller/vendor/github.com/google/go-cmp/cmp/ |
| D | compare.go | 231 case reflect.Chan, reflect.UnsafePointer:
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| /external/icu/icu4c/source/data/region/ |
| D | ga.txt | 142 IC{"na hOileáin Chanáracha"}
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/ |
| D | AMDGPUInstPrinter.cpp | 934 unsigned Chan = MI->getOperand(OpNum).getImm(); in printInterpAttrChan() local
935 O << '.' << "xyzw"[Chan & 0x3]; in printInterpAttrChan()
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| /external/curl/docs/ |
| D | THANKS | 48 Alex Chan
687 Hoi-Ho Chan
1532 Ryan Chan
|
| /external/lz4/ |
| D | NEWS | 39 API : lz4frame : negative compression levels trigger fast acceleration, request by Lawrence Chan
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| /external/golang-protobuf/jsonpb/ |
| D | jsonpb.go | 287 case reflect.Chan, reflect.Func, reflect.Interface:
|