Searched refs:CodeGenProcModel (Results 1 – 6 of 6) sorted by relevance
/external/llvm/utils/TableGen/ |
D | CodeGenSchedule.h | 175 struct CodeGenProcModel { struct 204 CodeGenProcModel(unsigned Idx, const std::string &Name, Record *MDef, in CodeGenProcModel() argument 234 std::vector<CodeGenProcModel> ProcModels; argument 292 const CodeGenProcModel &getModelForProc(Record *ProcDef) const { in getModelForProc() 299 CodeGenProcModel &getProcModel(Record *ModelDef) { in getProcModel() 304 const CodeGenProcModel &getProcModel(Record *ModelDef) const { in getProcModel() 309 typedef std::vector<CodeGenProcModel>::const_iterator ProcIter; 312 ArrayRef<CodeGenProcModel> procModels() const { return ProcModels; } in procModels() 374 const CodeGenProcModel &ProcModel) const; 386 const CodeGenProcModel &PM) const; [all …]
|
D | SubtargetEmitter.cpp | 91 void EmitProcessorResources(const CodeGenProcModel &ProcModel, 94 const CodeGenProcModel &ProcModel); 96 const CodeGenProcModel &ProcModel); 98 const CodeGenProcModel &ProcModel); 99 void GenSchedClassTables(const CodeGenProcModel &ProcModel, 367 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData() 420 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData() 600 void SubtargetEmitter::EmitProcessorResources(const CodeGenProcModel &ProcModel, in EmitProcessorResources() 649 const CodeGenSchedRW &SchedWrite, const CodeGenProcModel &ProcModel) { in FindWriteResources() 702 const CodeGenProcModel &ProcModel) { in FindReadAdvance() [all …]
|
D | CodeGenSchedule.cpp | 422 const CodeGenProcModel &ProcModel) const { in expandRWSeqForProc() 563 const CodeGenProcModel &ProcModel = in collectSchedClasses() 577 for (std::vector<CodeGenProcModel>::iterator PI = ProcModels.begin(), in collectSchedClasses() 778 for (CodeGenProcModel &ProcModel : ProcModels) { in collectProcItins() 838 for (CodeGenProcModel &ProcModel : ProcModels) { in collectProcUnsupportedFeatures() 871 const CodeGenProcModel &PM = ProcModels[PIdx]; in inferFromItinClass() 1113 const CodeGenProcModel &PM = in getIntersectingVariants() 1395 bool CodeGenSchedModels::hasSuperGroup(RecVec &SubUnits, CodeGenProcModel &PM) { in hasSuperGroup() 1415 void CodeGenSchedModels::verifyProcResourceGroups(CodeGenProcModel &PM) { in verifyProcResourceGroups() 1502 CodeGenProcModel &PM = getProcModel((*RI)->getValueAsDef("SchedModel")); in collectProcResources() [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | CodeGenSchedule.h | 207 struct CodeGenProcModel { struct 245 CodeGenProcModel(unsigned Idx, std::string Name, Record *MDef, in CodeGenProcModel() argument 282 std::vector<CodeGenProcModel> ProcModels; 340 const CodeGenProcModel &getModelForProc(Record *ProcDef) const { in getModelForProc() 347 CodeGenProcModel &getProcModel(Record *ModelDef) { in getProcModel() 352 const CodeGenProcModel &getProcModel(Record *ModelDef) const { in getProcModel() 357 using ProcIter = std::vector<CodeGenProcModel>::const_iterator; 360 ArrayRef<CodeGenProcModel> procModels() const { return ProcModels; } in procModels() 422 const CodeGenProcModel &ProcModel) const; 430 Record *findProcResUnits(Record *ProcResKind, const CodeGenProcModel &PM, [all …]
|
D | SubtargetEmitter.cpp | 94 unsigned EmitRegisterFileTables(const CodeGenProcModel &ProcModel, 96 void EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel, 100 void EmitProcessorResourceSubUnits(const CodeGenProcModel &ProcModel, 102 void EmitProcessorResources(const CodeGenProcModel &ProcModel, 105 const CodeGenProcModel &ProcModel); 107 const CodeGenProcModel &ProcModel); 109 const CodeGenProcModel &ProcModel); 110 void GenSchedClassTables(const CodeGenProcModel &ProcModel, 359 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData() 412 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData() [all …]
|
D | CodeGenSchedule.cpp | 232 CodeGenProcModel &PM = getProcModel(RCU->getValueAsDef("SchedModel")); in collectRetireControlUnits() 532 const CodeGenProcModel &ProcModel) const { in expandRWSeqForProc() 672 const CodeGenProcModel &ProcModel = in collectSchedClasses() 692 for (const CodeGenProcModel &PM : ProcModels) { in collectSchedClasses() 872 for (const CodeGenProcModel &PM : make_range(procModelBegin(),procModelEnd())) in hasItineraries() 881 for (CodeGenProcModel &ProcModel : ProcModels) { in collectProcItins() 942 for (CodeGenProcModel &ProcModel : ProcModels) { in collectProcUnsupportedFeatures() 977 const CodeGenProcModel &PM = ProcModels[PIdx]; in inferFromItinClass() 1200 const CodeGenProcModel &PM = in getIntersectingVariants() 1465 bool CodeGenSchedModels::hasSuperGroup(RecVec &SubUnits, CodeGenProcModel &PM) { in hasSuperGroup() [all …]
|