Searched refs:CombineOpc (Results 1 – 5 of 5) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1735 unsigned CombineOpc = 0; in SplitVecOp_VECREDUCE() local
1737 case ISD::VECREDUCE_FADD: CombineOpc = ISD::FADD; break; in SplitVecOp_VECREDUCE()
1738 case ISD::VECREDUCE_FMUL: CombineOpc = ISD::FMUL; break; in SplitVecOp_VECREDUCE()
1739 case ISD::VECREDUCE_ADD: CombineOpc = ISD::ADD; break; in SplitVecOp_VECREDUCE()
1740 case ISD::VECREDUCE_MUL: CombineOpc = ISD::MUL; break; in SplitVecOp_VECREDUCE()
1741 case ISD::VECREDUCE_AND: CombineOpc = ISD::AND; break; in SplitVecOp_VECREDUCE()
1742 case ISD::VECREDUCE_OR: CombineOpc = ISD::OR; break; in SplitVecOp_VECREDUCE()
1743 case ISD::VECREDUCE_XOR: CombineOpc = ISD::XOR; break; in SplitVecOp_VECREDUCE()
1744 case ISD::VECREDUCE_SMAX: CombineOpc = ISD::SMAX; break; in SplitVecOp_VECREDUCE()
1745 case ISD::VECREDUCE_SMIN: CombineOpc = ISD::SMIN; break; in SplitVecOp_VECREDUCE()
[all …]
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 2851 unsigned CombineOpc, unsigned ZeroReg = 0, in canCombine() argument
2859 if (!MI || MI->getParent() != &MBB || (unsigned)MI->getOpcode() != CombineOpc) in canCombine()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 3560 unsigned CombineOpc, unsigned ZeroReg = 0, in canCombine() argument
3568 if (!MI || MI->getParent() != &MBB || (unsigned)MI->getOpcode() != CombineOpc) in canCombine()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15283 unsigned CombineOpc; in LowerVSETCC() local
15287 CombineOpc = Opc == X86ISD::CMPP ? static_cast<unsigned>(X86ISD::FOR) : in LowerVSETCC()
15293 CombineOpc = Opc == X86ISD::CMPP ? static_cast<unsigned>(X86ISD::FAND) : in LowerVSETCC()
15301 Cmp = DAG.getNode(CombineOpc, dl, VT, Cmp0, Cmp1); in LowerVSETCC()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 18405 unsigned CombineOpc; in LowerVSETCC() local
18409 CombineOpc = X86ISD::FOR; in LowerVSETCC()
18414 CombineOpc = X86ISD::FAND; in LowerVSETCC()
18421 Cmp = DAG.getNode(CombineOpc, dl, VT, Cmp0, Cmp1); in LowerVSETCC()
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