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Searched refs:CondOp1 (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Vectorize/
DLoopVectorizationLegality.cpp374 Value *CondOp1 = LatchCmp->getOperand(1); in isUniformLoop() local
376 if (!(CondOp0 == IVUpdate && OuterLp->isLoopInvariant(CondOp1)) && in isUniformLoop()
377 !(CondOp1 == IVUpdate && OuterLp->isLoopInvariant(CondOp0))) { in isUniformLoop()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp15736 SDValue CondOp0 = Cond.getOperand(0), CondOp1 = Cond.getOperand(1); in LowerSELECT() local
15738 cast<CondCodeSDNode>(Cond.getOperand(2))->get(), CondOp0, CondOp1); in LowerSELECT()
15742 SDValue Cmp = DAG.getNode(X86ISD::FSETCC, DL, MVT::i1, CondOp0, CondOp1, in LowerSELECT()
15747 SDValue Cmp = DAG.getNode(X86ISD::FSETCC, DL, VT, CondOp0, CondOp1, in LowerSELECT()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp18829 SDValue CondOp0 = Cond.getOperand(0), CondOp1 = Cond.getOperand(1); in LowerSELECT() local
18831 cast<CondCodeSDNode>(Cond.getOperand(2))->get(), CondOp0, CondOp1); in LowerSELECT()
18835 CondOp1, DAG.getConstant(SSECC, DL, MVT::i8)); in LowerSELECT()
18841 SDValue Cmp = DAG.getNode(X86ISD::FSETCC, DL, VT, CondOp0, CondOp1, in LowerSELECT()