Searched refs:ConvertedOp (Results 1 – 2 of 2) sorted by relevance
14817 unsigned ConvertedOp = 0; in EmitTest() local14823 case ISD::ADD: ConvertedOp = X86ISD::ADD; break; in EmitTest()14824 case ISD::SUB: ConvertedOp = X86ISD::SUB; break; in EmitTest()14825 case ISD::AND: ConvertedOp = X86ISD::AND; break; in EmitTest()14826 case ISD::OR: ConvertedOp = X86ISD::OR; break; in EmitTest()14827 case ISD::XOR: ConvertedOp = X86ISD::XOR; break; in EmitTest()14830 if (ConvertedOp) { in EmitTest()14835 Op = DAG.getNode(ConvertedOp, dl, VT, V0, V1); in EmitTest()
17921 unsigned ConvertedOp = 0; in EmitTest() local17927 case ISD::ADD: ConvertedOp = X86ISD::ADD; break; in EmitTest()17928 case ISD::SUB: ConvertedOp = X86ISD::SUB; break; in EmitTest()17929 case ISD::AND: ConvertedOp = X86ISD::AND; break; in EmitTest()17930 case ISD::OR: ConvertedOp = X86ISD::OR; break; in EmitTest()17931 case ISD::XOR: ConvertedOp = X86ISD::XOR; break; in EmitTest()17934 if (ConvertedOp) { in EmitTest()17940 Op = DAG.getNode(ConvertedOp, dl, VTs, V0, V1); in EmitTest()