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Searched refs:CountLeadingZeros (Results 1 – 25 of 29) sorted by relevance

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/external/v8/src/arm64/
Dutils-arm64.cc76 int CountLeadingZeros(uint64_t value, int width) { in CountLeadingZeros() function
88 return CountLeadingZeros(value, width) - 1; in CountLeadingSignBits()
90 return CountLeadingZeros(~value, width) - 1; in CountLeadingSignBits()
121 return 63 - CountLeadingZeros(value, 64); in HighestSetBitPosition()
Dutils-arm64.h34 int CountLeadingZeros(uint64_t value, int width);
Dsimulator-logic-arm64.cc61 const int highest_significant_bit = 63 - CountLeadingZeros(src, 64); in UFixedToDouble()
86 const int highest_significant_bit = 63 - CountLeadingZeros(src, 64); in UFixedToFloat()
152 int shift = CountLeadingZeros(mantissa << (32 - 10), 32); in FPToFloat()
1520 result[i] = CountLeadingZeros(src.Uint(vform, i), laneSizeInBits); in clz()
1562 } else if ((shift_val > CountLeadingZeros(lj_src_val, 64)) && in sshl()
1613 if ((shift_val > CountLeadingZeros(lj_src_val, 64)) && (lj_src_val != 0)) { in ushl()
Dassembler-arm64.cc81 int index = CountLeadingZeros(list_, kRegListSizeInBits); in PopHighestIndex()
4530 clz_a = CountLeadingZeros(a, kXRegSizeInBits); in IsImmLogical()
4531 int clz_c = CountLeadingZeros(c, kXRegSizeInBits); in IsImmLogical()
4552 clz_a = CountLeadingZeros(a, kXRegSizeInBits); in IsImmLogical()
4585 int multiplier_idx = CountLeadingZeros(d, kXRegSizeInBits) - 57; in IsImmLogical()
4604 int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSizeInBits); in IsImmLogical()
Dsimulator-arm64.cc2308 case CLZ_w: set_wreg(dst, CountLeadingZeros(wreg(src), kWRegSizeInBits)); in VisitDataProcessing1Source()
2310 case CLZ_x: set_xreg(dst, CountLeadingZeros(xreg(src), kXRegSizeInBits)); in VisitDataProcessing1Source()
Dsimulator-arm64.h147 const int highest_significant_bit = 63 - CountLeadingZeros(mantissa, 64); in FPRound()
/external/libcxx/test/support/
Dhexfloat.h26 static int CountLeadingZeros(unsigned long long n) { in CountLeadingZeros() function
43 int exp2 = -static_cast<int>(Digits - CountLeadingZeros(m0)/4*4); in hexfloat()
/external/v8/src/wasm/baseline/
Dliftoff-register.h49 base::bits::CountLeadingZeros(kLiftoffAssemblerGpCacheRegs);
53 base::bits::CountLeadingZeros(kLiftoffAssemblerFpCacheRegs);
64 32 - base::bits::CountLeadingZeros<uint32_t>(kAfterMaxLiftoffRegCode - 1);
66 32 - base::bits::CountLeadingZeros<uint32_t>(kMaxGpRegCode);
269 8 * sizeof(regs_) - 1 - base::bits::CountLeadingZeros(regs_); in GetLastRegSet()
/external/v8/src/base/
Dbits.h76 CountLeadingZeros(T value) { in CountLeadingZeros() function
92 return CountLeadingZeros<T, next_bits>(next_value) + add; in CountLeadingZeros()
97 return CountLeadingZeros(value); in CountLeadingZeros32()
100 return CountLeadingZeros(value); in CountLeadingZeros64()
Dbits.cc21 return 1u << (32 - CountLeadingZeros(value)); in RoundUpToPowerOfTwo32()
37 return uint64_t{1} << (64 - CountLeadingZeros(value)); in RoundUpToPowerOfTwo64()
/external/vixl/src/
Dcompiler-intrinsics-vixl.cc35 return CountLeadingZeros(value, width) - 1; in CountLeadingSignBitsFallBack()
37 return CountLeadingZeros(~value, width) - 1; in CountLeadingSignBitsFallBack()
Dcompiler-intrinsics-vixl.h121 inline int CountLeadingZeros(V value, int width = (sizeof(V) * 8)) {
Dutils-vixl.cc288 int shift = CountLeadingZeros(mantissa << (32 - 10)); in FPToFloat()
Dutils-vixl.h456 return (sizeof(value) * 8 - 1) - CountLeadingZeros(value); in HighestSetBitPosition()
1134 const int highest_significant_bit = 63 - CountLeadingZeros(mantissa); in FPRound()
/external/tensorflow/tensorflow/lite/kernels/internal/
Dcommon.h117 int CountLeadingZeros(T integer_input) { in CountLeadingZeros() function
296 int z_a_headroom_plus_1 = CountLeadingZeros(static_cast<uint32>(z_a.raw())); in log_x_for_x_greater_than_or_equal_to_1_impl()
311 int z_b_headroom = CountLeadingZeros(static_cast<uint32>(z_b.raw())) - 1; in log_x_for_x_greater_than_or_equal_to_1_impl()
353 int headroom_plus_one = CountLeadingZeros(static_cast<uint32>(x)); in GetReciprocal()
378 CountLeadingZeros(static_cast<uint32>(input)) - 1; in GetInvSqrtQuantizedMultiplierExp()
/external/v8/src/runtime/
Druntime-numbers.cc127 int x_log2 = 31 - base::bits::CountLeadingZeros(x_scaled); in RUNTIME_FUNCTION()
131 int y_log2 = 31 - base::bits::CountLeadingZeros(y_scaled); in RUNTIME_FUNCTION()
/external/tensorflow/tensorflow/contrib/lite/kernels/internal/
Dcommon.h119 int CountLeadingZeros(T integer_input) { in CountLeadingZeros() function
/external/v8/src/objects/
Dbigint.cc854 int msd_leading_zeros = base::bits::CountLeadingZeros(x_msd); in CompareToDouble()
996 int msd_leading_zeros = base::bits::CountLeadingZeros(x_msd); in ToDouble()
1492 int shift = base::bits::CountLeadingZeros(divisor->digit(n - 1)); in AbsoluteDivLarge()
1942 const int msd_leading_zeros = base::bits::CountLeadingZeros(msd); in ToStringBasePowerOfTwo()
2002 length * kDigitBits - base::bits::CountLeadingZeros(x->digit(length - 1)); in ToStringGeneric()
2500 int s = base::bits::CountLeadingZeros(divisor); in digit_div()
/external/vixl/src/aarch64/
Doperands-aarch64.cc49 int index = CountLeadingZeros(list_); in PopHighestIndex()
Dlogic-aarch64.cc107 const int highest_significant_bit = 63 - CountLeadingZeros(src); in UFixedToDouble()
134 const int highest_significant_bit = 63 - CountLeadingZeros(src); in UFixedToFloat()
163 const int highest_significant_bit = 63 - CountLeadingZeros(src); in UFixedToFloat16()
1688 result[i] = CountLeadingZeros(src.Uint(vform, i), laneSizeInBits); in clz()
1739 } else if ((shift_val > CountLeadingZeros(lj_src_val)) && in sshl()
1792 if ((shift_val > CountLeadingZeros(lj_src_val)) && (lj_src_val != 0)) { in ushl()
Dassembler-aarch64.cc5679 clz_a = CountLeadingZeros(a, kXRegSize); in IsImmLogical()
5680 int clz_c = CountLeadingZeros(c, kXRegSize); in IsImmLogical()
5701 clz_a = CountLeadingZeros(a, kXRegSize); in IsImmLogical()
5734 uint64_t multiplier = multipliers[CountLeadingZeros(d, kXRegSize) - 57]; in IsImmLogical()
5749 int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSize); in IsImmLogical()
/external/v8/src/heap/
Dobject-stats.cc285 return kSizetSize * 8 - 1 - base::bits::CountLeadingZeros(size); in Log2ForSize()
/external/v8/src/x64/
Dmacro-assembler-x64.cc1242 unsigned nlz = base::bits::CountLeadingZeros(src); in Move()
1261 unsigned nlz = base::bits::CountLeadingZeros(src); in Move()
/external/tensorflow/tensorflow/contrib/lite/kernels/internal/optimized/
Doptimized_ops.h2764 CountLeadingZeros(static_cast<uint32>(input)) - 1; in GetInvSqrtQuantizedMultiplierExp()
4716 CountLeadingZeros(static_cast<uint32>(fixed_sum_of_exps)); in Softmax()
4885 int z_a_headroom_plus_1 = CountLeadingZeros(static_cast<uint32>(z_a.raw())); in log_x_for_x_greater_than_or_equal_to_1_impl()
4900 int z_b_headroom = CountLeadingZeros(static_cast<uint32>(z_b.raw())) - 1; in log_x_for_x_greater_than_or_equal_to_1_impl()
/external/v8/src/wasm/
Dwasm-interpreter.cc378 return base::bits::CountLeadingZeros(val); in ExecuteI32Clz()
394 return base::bits::CountLeadingZeros(val); in ExecuteI64Clz()

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