| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 985 BrInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitJump2Table()
1034 Inst.addOperand(MCOperand::CreateImm(pred)); in populateADROperands()
1248 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1270 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1279 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1293 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1305 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1342 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1379 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1404 AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 639 I = MI.insert(I, MCOperand::CreateImm(CC)); in AddThumbPredicate()
649 I = MI.insert(I, MCOperand::CreateImm(CC)); in AddThumbPredicate()
993 Inst.addOperand(MCOperand::CreateImm(Val)); in DecodePredicateOperand()
1015 Inst.addOperand(MCOperand::CreateImm(rot_imm)); in DecodeSOImmOperand()
1051 Inst.addOperand(MCOperand::CreateImm(Op)); in DecodeSORegImmOperand()
1086 Inst.addOperand(MCOperand::CreateImm(Shift)); in DecodeSORegRegOperand()
1177 Inst.addOperand(MCOperand::CreateImm(~(msb_mask ^ lsb_mask))); in DecodeBitfieldMaskOperand()
1232 Inst.addOperand(MCOperand::CreateImm(coproc)); in DecodeCopMemInstruction()
1233 Inst.addOperand(MCOperand::CreateImm(CRd)); in DecodeCopMemInstruction()
1281 Inst.addOperand(MCOperand::CreateImm(imm)); in DecodeCopMemInstruction()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/Disassembler/ |
| D | MBlazeDisassembler.cpp | 559 instr.addOperand(MCOperand::CreateImm(insn&0x3FFF)); in getInstruction()
564 instr.addOperand(MCOperand::CreateImm(insn&0x3FFF)); in getInstruction()
572 instr.addOperand(MCOperand::CreateImm(insn&0x7FFF)); in getInstruction()
584 instr.addOperand(MCOperand::CreateImm(getIMM(insn))); in getInstruction()
589 instr.addOperand(MCOperand::CreateImm(insn&0x1F)); in getInstruction()
605 instr.addOperand(MCOperand::CreateImm(getIMM(insn))); in getInstruction()
619 instr.addOperand(MCOperand::CreateImm(getIMM(insn))); in getInstruction()
629 instr.addOperand(MCOperand::CreateImm(getIMM(insn))); in getInstruction()
637 instr.addOperand(MCOperand::CreateImm(getSHT(insn))); in getInstruction()
651 instr.addOperand(MCOperand::CreateImm(getFSL(insn))); in getInstruction()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 919 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
921 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
928 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addCondCodeOperands()
935 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocNumOperands()
940 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocRegOperands()
945 Inst.addOperand(MCOperand::CreateImm(CoprocOption.Val)); in addCoprocOptionOperands()
950 Inst.addOperand(MCOperand::CreateImm(ITMask.Mask)); in addITMaskOperands()
955 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addITCondCodeOperands()
973 Inst.addOperand(MCOperand::CreateImm( in addRegShiftedRegOperands()
981 Inst.addOperand(MCOperand::CreateImm( in addRegShiftedImmOperands()
[all …]
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInfo.cpp | 112 Cond.push_back(MachineOperand::CreateImm(true)); in analyzeBranch()
123 Cond.push_back(MachineOperand::CreateImm(false)); in analyzeBranch()
196 Cond.front() = MachineOperand::CreateImm(!Cond.front().getImm()); in ReverseBranchCondition()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInfo.cpp | 113 Cond.push_back(MachineOperand::CreateImm(true)); in analyzeBranch()
124 Cond.push_back(MachineOperand::CreateImm(false)); in analyzeBranch()
201 Cond.front() = MachineOperand::CreateImm(!Cond.front().getImm()); in reverseBranchCondition()
|
| D | WebAssemblyCallIndirectFixup.cpp | 106 Ops.push_back(MachineOperand::CreateImm(0)); in runOnMachineFunction()
110 Ops.push_back(MachineOperand::CreateImm(0)); in runOnMachineFunction()
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| D | WebAssemblyExplicitLocals.cpp | 318 MO = MachineOperand::CreateImm(LocalId); in runOnMachineFunction()
334 MO = MachineOperand::CreateImm(LocalId); in runOnMachineFunction()
|
| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 487 static AMDGPUOperand::Ptr CreateImm(int64_t Val, SMLoc Loc, in CreateImm() function in __anonbb0be1270111::AMDGPUOperand
988 Operands.push_back(AMDGPUOperand::CreateImm(IntVal, S)); in parseImm()
1002 AMDGPUOperand::CreateImm(F.bitcastToAPInt().getZExtValue(), S, in parseImm()
1580 Operands.push_back(AMDGPUOperand::CreateImm(Value, S, ImmTy)); in parseIntWithPrefix()
1612 Operands.push_back(AMDGPUOperand::CreateImm(Bit, S, ImmTy)); in parseNamedBit()
1787 Operands.push_back(AMDGPUOperand::CreateImm(CntVal, S)); in parseSWaitCntOps()
1892 Operands.push_back(AMDGPUOperand::CreateImm(Imm16Val, S, AMDGPUOperand::ImmTyHwreg)); in parseHwreg()
2075 Operands.push_back(AMDGPUOperand::CreateImm(Imm16Val, S, AMDGPUOperand::ImmTySendMsg)); in parseSendMsgOp()
2097 Operands.push_back(AMDGPUOperand::CreateImm(Imm, S)); in parseSOppBrTarget()
2115 return AMDGPUOperand::CreateImm(0, SMLoc(), AMDGPUOperand::ImmTyGLC); in defaultGLC()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| D | X86Disassembler.cpp | 256 mcInst.addOperand(MCOperand::CreateImm(immediate)); in translateImmediate()
354 scaleAmount = MCOperand::CreateImm(insn.sibScale); in translateRMMemory()
409 scaleAmount = MCOperand::CreateImm(1); in translateRMMemory()
412 displacement = MCOperand::CreateImm(insn.displacement); in translateRMMemory()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeMCInstLower.cpp | 132 MCOp = MCOperand::CreateImm(MO.getImm()); in Lower()
160 MCOp = MCOperand::CreateImm(Val); in Lower()
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| D | MBlazeInstrInfo.cpp | 146 Cond.push_back(MachineOperand::CreateImm(LastInst->getOpcode())); in AnalyzeBranch()
165 Cond.push_back(MachineOperand::CreateImm(SecondLastInst->getOpcode())); in AnalyzeBranch()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrBuilder.h | 72 MO.push_back(MachineOperand::CreateImm(Scale)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/AsmParser/ |
| D | MBlazeAsmParser.cpp | 180 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
182 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
238 static MBlazeOperand *CreateImm(const MCExpr *Val, SMLoc S, SMLoc E) { in CreateImm() function
452 return MBlazeOperand::CreateImm(EVal, S, E); in ParseImmediate()
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 72 MO.push_back(MachineOperand::CreateImm(Scale)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 77 MO.push_back(MachineOperand::CreateImm(Scale)); in getFullAddress()
84 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 725 static AMDGPUOperand::Ptr CreateImm(const AMDGPUAsmParser *AsmParser, in CreateImm() function in __anone445c97f0111::AMDGPUOperand
1921 Operands.push_back(AMDGPUOperand::CreateImm(this, IntVal, S)); in parseImm()
1933 AMDGPUOperand::CreateImm(this, F.bitcastToAPInt().getZExtValue(), S, in parseImm()
2135 Operands.push_back(AMDGPUOperand::CreateImm(this, 0, Tok.getLoc(), in parseVReg32OrOff()
3401 Operands.push_back(AMDGPUOperand::CreateImm(this, Value, S, ImmTy)); in parseIntWithPrefix()
3451 Operands.push_back(AMDGPUOperand::CreateImm(this, Val, S, ImmTy)); in parseOperandArrayWithPrefix()
3483 Operands.push_back(AMDGPUOperand::CreateImm(this, Bit, S, ImmTy)); in parseNamedBit()
3747 Operands.push_back(AMDGPUOperand::CreateImm(this, Waitcnt, S)); in parseSWaitCntOps()
3855 Operands.push_back(AMDGPUOperand::CreateImm(this, Imm16Val, S, AMDGPUOperand::ImmTyHwreg)); in parseHwreg()
3979 Operands.push_back(AMDGPUOperand::CreateImm(this, Slot, S, in parseInterpSlot()
[all …]
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 578 Ops.push_back(MachineOperand::CreateImm(StackMaps::ConstantOp)); in addStackMapLiveVars()
579 Ops.push_back(MachineOperand::CreateImm(C->getSExtValue())); in addStackMapLiveVars()
581 Ops.push_back(MachineOperand::CreateImm(StackMaps::ConstantOp)); in addStackMapLiveVars()
582 Ops.push_back(MachineOperand::CreateImm(0)); in addStackMapLiveVars()
624 Ops.push_back(MachineOperand::CreateImm(ID->getZExtValue())); in selectStackmap()
630 Ops.push_back(MachineOperand::CreateImm(NumBytes->getZExtValue())); in selectStackmap()
765 Ops.push_back(MachineOperand::CreateImm(ID->getZExtValue())); in selectPatchpoint()
771 Ops.push_back(MachineOperand::CreateImm(NumBytes->getZExtValue())); in selectPatchpoint()
777 Ops.push_back(MachineOperand::CreateImm(CalleeConstAddr)); in selectPatchpoint()
782 Ops.push_back(MachineOperand::CreateImm(CalleeConstAddr)); in selectPatchpoint()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 756 Ops.push_back(MachineOperand::CreateImm(StackMaps::ConstantOp)); in addStackMapLiveVars()
757 Ops.push_back(MachineOperand::CreateImm(C->getSExtValue())); in addStackMapLiveVars()
759 Ops.push_back(MachineOperand::CreateImm(StackMaps::ConstantOp)); in addStackMapLiveVars()
760 Ops.push_back(MachineOperand::CreateImm(0)); in addStackMapLiveVars()
802 Ops.push_back(MachineOperand::CreateImm(ID->getZExtValue())); in selectStackmap()
808 Ops.push_back(MachineOperand::CreateImm(NumBytes->getZExtValue())); in selectStackmap()
941 Ops.push_back(MachineOperand::CreateImm(ID->getZExtValue())); in selectPatchpoint()
947 Ops.push_back(MachineOperand::CreateImm(NumBytes->getZExtValue())); in selectPatchpoint()
953 Ops.push_back(MachineOperand::CreateImm(CalleeConstAddr)); in selectPatchpoint()
958 Ops.push_back(MachineOperand::CreateImm(CalleeConstAddr)); in selectPatchpoint()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 222 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in AnalyzeBranch()
244 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in AnalyzeBranch()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/ |
| D | MachineOperandTest.cpp | 28 MachineOperand MO = MachineOperand::CreateImm(50); in TEST()
110 MachineOperand MO = MachineOperand::CreateImm(3); in TEST()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 290 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
308 Inst.addOperand(MCOperand::CreateImm(getMemScale())); in addMemOperands()
332 static X86Operand *CreateImm(const MCExpr *Val, SMLoc StartLoc, SMLoc EndLoc){ in CreateImm() function
520 return X86Operand::CreateImm(Val, Start, End); in ParseOperand()
728 Operands.push_back(X86Operand::CreateImm(ExtraImmOp, NameLoc, NameLoc)); in ParseInstruction()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 348 MI->addOperand(MachineOperand::CreateImm(C->getSExtValue())); in AddOperand()
520 MI->addOperand(MachineOperand::CreateImm(SD->getZExtValue())); in EmitSubregNode()
527 MI->addOperand(MachineOperand::CreateImm(SubIdx)); in EmitSubregNode()
850 MI->addOperand(MachineOperand::CreateImm(ExtraInfo)); in EmitSpecialNode()
858 MI->addOperand(MachineOperand::CreateImm(Flags)); in EmitSpecialNode()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1849 static std::unique_ptr<AArch64Operand> CreateImm(const MCExpr *Val, SMLoc S, in CreateImm() function in __anon766491d50111::AArch64Operand
2444 Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); in tryParseAdrpLabel()
2462 Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); in tryParseAdrLabel()
2541 AArch64Operand::CreateImm(Imm, S, E, getContext())); in tryParseImmWithOptionalShift()
2576 Operands.push_back(AArch64Operand::CreateImm(Imm, S, E, getContext())); in tryParseImmWithOptionalShift()
2749 AArch64Operand::CreateImm(Expr, S, getLoc(), getContext())); in createSysAlias()
2756 AArch64Operand::CreateImm(Expr, S, getLoc(), getContext())); in createSysAlias()
3387 Operands.push_back(AArch64Operand::CreateImm( in parseOptionalMulOperand()
3426 Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); in parseOperand()
3468 Operands.push_back(AArch64Operand::CreateImm(IdVal, S, E, getContext())); in parseOperand()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 221 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
242 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
|