/external/libxaac/decoder/armv7/ |
D | ixheaacd_dec_DCT2_64_asm.s | 89 VSWP D4, D5 122 VSWP D4, D5 166 VSWP D4, D5 216 VSWP D4, D5 323 VST1.16 D4[0], [R1]! 331 VLD2.16 {D4, D5}, [R7]! 336 VMULL.U16 Q14, D0, D4 340 VMLAL.S16 Q14, D1, D4 345 VMLAL.U16 Q13, D2, D4 348 VMLAL.S16 Q13, D3, D4 [all …]
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D | ixheaacd_dct3_32.s | 67 VUZP.16 D4, D5 72 VMULL.U16 Q15, D4, D12 75 VMULL.U16 Q14, D4, D13 106 VUZP.16 D4, D5 128 VMULL.U16 Q15, D4, D12 130 VMULL.U16 Q14, D4, D13 162 VUZP.16 D4, D5 171 VMULL.U16 Q15, D4, D12 175 VMULL.U16 Q14, D4, D13 216 VUZP.16 D4, D5 [all …]
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D | ixheaacd_esbr_qmfsyn64_winadd.s | 54 VLD1.32 {D4, D5}, [R0], R8 57 VMLAL.S32 Q13, D6, D4 90 VLD1.32 {D4, D5}, [R1], R8 95 VMLAL.S32 Q13, D6, D4 147 VLD1.32 {D4, D5}, [R0], R8 150 VMLAL.S32 Q13, D6, D4 183 VLD1.32 {D4, D5}, [R1], R8 188 VMLAL.S32 Q13, D6, D4 233 VLD1.32 {D4, D5}, [R0], R8 239 VMLAL.S32 Q13, D6, D4 [all …]
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D | ixheaacd_pre_twiddle_compute.s | 114 VLD4.16 {D4, D5, D6, D7}, [R1], R8 125 VMULL.U16 Q14, D4, D9 127 VMULL.U16 Q12, D4, D8 176 VLD4.16 {D4, D5, D6, D7}, [R1], R8 192 VMULL.U16 Q14, D4, D9 196 VMULL.U16 Q12, D4, D8 240 VLD4.16 {D4, D5, D6, D7}, [R1], R8 256 VMULL.U16 Q14, D4, D9 260 VMULL.U16 Q12, D4, D8 308 VMOV.S32 D4, #0x00000000 [all …]
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D | ixheaacd_overlap_add1.s | 71 VLD1.32 {D4, D5}, [R1]! 80 VMULL.S32 Q13, D4, D14 101 VMULL.S32 Q0, D14, D4 118 VLD1.32 {D4, D5}, [R1]! 145 VMULL.S32 Q8, D4, D14 155 VMULL.S32 Q0, D4, D14 162 VLD1.32 {D4, D5}, [R1]! 195 VMULL.S32 Q8, D4, D14 205 VMULL.S32 Q0, D4, D14 222 VLD1.32 {D4, D5}, [R1]! [all …]
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D | ixheaacd_overlap_add2.s | 56 VREV64.16 D4, D6 64 VMLSL.U16 Q13, D4, D3 85 VREV64.16 D4, D6 86 VMLSL.U16 Q13, D4, D3 169 VLD2.16 {D4, D5}, [R1]! 172 VMLSL.U16 Q13, D4, D2 186 VMLSL.U16 Q13, D4, D2 215 VLD2.16 {D4, D5}, [R1]! 222 VMLSL.U16 Q13, D4, D2
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D | ixheaacd_post_twiddle.s | 103 VLD4.16 {D4, D5, D6, D7}, [R1]! 128 VMULL.U16 Q10, D4, D9 136 VMULL.U16 Q8, D4, D8 207 VLD4.16 {D4, D5, D6, D7}, [R1]! 235 VMULL.U16 Q10, D4, D9 243 VMULL.U16 Q8, D4, D8 313 VLD4.16 {D4, D5, D6, D7}, [R1]! 343 VMULL.U16 Q10, D4, D9 351 VMULL.U16 Q8, D4, D8 427 VLD2.32 {D4, D6}, [R1]! [all …]
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D | ixheaacd_sbr_qmfanal32_winadds.s | 91 VLD2.16 {D3, D4}, [R2]! 95 VLD1.16 D4, [R0], R6 103 VMLAL.S16 Q15, D4, D5 179 VLD2.16 {D3, D4}, [R2]! 183 VLD1.16 D4, [R0], R6 197 VMLAL.S16 Q15, D4, D5
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D | ixheaacd_sbr_qmfsyn64_winadd.s | 68 VLD1.16 D4, [R0], R8 74 VMLAL.S16 Q13, D5, D4 144 VLD1.16 D4, [R0], R8 190 VMLAL.S16 Q13, D5, D4 215 VLD1.16 D4, [R0], R8 233 VMLAL.S16 Q13, D5, D4 297 VLD1.16 D4, [R0], R8 347 VMLAL.S16 Q13, D5, D4
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D | ixheaacd_calc_pre_twid.s | 39 VLD2.32 {D4, D5}, [R0]! 46 VNEG.S32 D5, D4 52 VMULL.S32 Q9, D2, D4
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D | ixheaacd_calc_post_twid.s | 40 VLD1.32 {D4, D5}, [R1]! 43 VMULL.S32 Q4, D4, D0 46 VMULL.S32 Q7, D4, D2
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D | ixheaacd_sbr_qmfanal32_winadds_eld.s | 68 VLD1.16 {D3, D4}, [R2]! @ tmpQmf_c1[2*(n + 64)] load and incremented 72 VLD1.16 D4, [R0], R6 @ tmpQ1[n + 128] load and incremented by R6 81 VMLAL.S16 Q15, D4, D5 159 VLD1.16 {D3, D4}, [R2]! 163 VLD1.16 D4, [R0], R6 178 VMLAL.S16 Q15, D4, D5
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D | ixheaacd_mps_synt_pre_twiddle.s | 43 VSHRN.I64 D4, Q2, #31 49 VQADD.S32 D1, D4, D10
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D | ixheaacd_mps_synt_post_twiddle.s | 43 VSHRN.I64 D4, Q2, #31 49 VQADD.S32 D1, D4, D10
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D | ixheaacd_mps_synt_post_fft_twiddle.s | 40 VLD1.32 {D4, D5}, [R3]! 43 VMULL.S32 Q4, D0, D4
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/external/libhevc/common/arm/ |
D | ihevc_resi_trans_32x32_a9q.s | 165 VLD1.U8 {D4,D5},[R1]! @LOAD 1-16 pred row 1 169 VSUBL.U8 Q8,D0,D4 @ Get residue 1-8 row 1 -- dual issued with prev. instr. 2nd cycle 187 VABDL.U8 Q15,D0,D4 211 VSWP D4,D5 @ Q2: 24 23 22 21 20 19 18 17 row 2 231 VMOV.S16 D1,D4 252 VREV32.16 D4,D27 254 @ D4 R1eee[3] R1eee[2] R2eee[3] R2eee[2] 256 VNEG.S16 D5,D4 267 VTRN.S16 D4,D5 271 VDUP.S32 D8,D4[0] @ R1eeee[0] R1eeeo[0] R1eeee[0] R1eeeo[0] [all …]
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D | ihevc_sao_band_offset_luma.s | 115 VLD1.8 D4,[r14]! @band_table.val[3] 134 … VADD.I8 D8,D4,D31 @band_table.val[3] = vadd_u8(band_table.val[3], band_pos) 145 …VADD.I8 D4,D8,D26 @band_table.val[3] = vadd_u8(band_table.val[3], vdup_n_u8(… 150 VCLE.U8 D12,D4,D29 @vcle_u8(band_table.val[3], vdup_n_u8(16)) 153 VORR.U8 D4,D4,D12 @band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp) 163 VAND.U8 D4,D4,D12 @band_table.val[3] = vand_u8(band_table.val[3], au1_cmp) 209 …VTBX.8 D13,{D1-D4},D14 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba… 212 …VTBX.8 D15,{D1-D4},D16 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba… 215 …VTBX.8 D17,{D1-D4},D18 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba… 218 …VTBX.8 D19,{D1-D4},D20 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, ba…
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D | ihevc_sao_band_offset_chroma.s | 123 VLD1.8 D4,[r14]! @band_table_u.val[3] 142 …VADD.I8 D8,D4,D31 @band_table_u.val[3] = vadd_u8(band_table_u.val[3], sao_ba… 160 …VADD.I8 D4,D8,D26 @band_table_u.val[3] = vadd_u8(band_table_u.val[3], vdup_n… 166 VCLE.U8 D13,D4,D30 @vcle_u8(band_table.val[3], vdup_n_u8(16)) 169 VORR.U8 D4,D4,D13 @band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp) 179 VAND.U8 D4,D4,D13 @band_table.val[3] = vand_u8(band_table.val[3], au1_cmp) 307 …VTBX.8 D5,{D1-D4},D7 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(… 313 …VTBX.8 D13,{D1-D4},D15 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(… 323 …VTBX.8 D17,{D1-D4},D19 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(… 328 …VTBX.8 D21,{D1-D4},D23 @vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(… [all …]
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/external/clang/test/CXX/special/class.copy/ |
D | p23-cxx11.cpp | 111 struct D4 { struct 112 …D4 &operator=(D4 &&) = default; // expected-note {{here}} expected-note {{copy assignment operator… 132 template struct MoveAssign<D4>; // expected-note {{here}} argument 133 template struct MoveOrCopyAssign<D4>; // expected-note {{here}}
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/external/clang/test/CodeGenCXX/ |
D | homogeneous-aggregates.cpp | 32 struct D4 : Base2, Base3 { // homogeneous aggregate struct 61 D4 CC func_D4(D4 x) { return x; } in func_D4()
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Support/ |
D | AlignOfTest.cpp | 56 struct D4 : S2 { int x; }; argument 60 struct D8 : S1, D4, D5 { double x[2]; }; 153 EXPECT_EQ(alignof(D4), alignof(AlignedCharArrayUnion<D4>)); in TEST() 208 EXPECT_EQ(sizeof(D4), sizeof(AlignedCharArrayUnion<D4>)); in TEST()
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/external/llvm/unittests/Support/ |
D | AlignOfTest.cpp | 56 struct D4 : S2 { int x; }; struct 60 struct D8 : S1, D4, D5 { double x[2]; }; 138 [AlignOf<D4>::Alignment > 0] 179 EXPECT_LE(alignOf<S1>(), alignOf<D4>()); in TEST() 261 EXPECT_EQ(alignOf<D4>(), alignOf<AlignedCharArrayUnion<D4> >()); in TEST() 316 EXPECT_EQ(sizeof(D4), sizeof(AlignedCharArrayUnion<D4>)); in TEST()
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/external/toybox/tests/files/bc/ |
D | print_results.txt | 3327 .D4 3328 1.D4 3329 6B.D4 3690 D4 3693 D4.286 4532 D4 4535 D4.2EB 4975 .D4 4976 1.D4 4977 53.D4 [all …]
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/external/clang/test/CXX/special/class.dtor/ |
D | p5-0x.cpp | 102 struct D4 { // expected-note {{virtual destructor requires an unambiguous, accessible 'operator del… struct 103 virtual ~D4() = default; // expected-note {{implicitly deleted here}}
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/external/boringssl/src/crypto/chacha/asm/ |
D | chacha-armv8.pl | 693 $A3,$B3,$C3,$D3,$A4,$B4,$C4,$D4,$A5,$B5,$C5,$D5) = map("v$_.4s",(0..23)); 777 add $D4,$D0,$ONE // +4 799 my @thread4=&NEONROUND($A4,$B4,$C4,$D4,$T4,0); 818 @thread4=&NEONROUND($A4,$B4,$C4,$D4,$T4,1); 913 @thread4=&NEONROUND($A4,$B4,$C4,$D4,$T4,0); 930 @thread4=&NEONROUND($A4,$B4,$C4,$D4,$T4,1); 976 add $D4,$D4,$ONE // +4 988 add $D4,$D4,@K[3] 1064 eor $D4,$D4,$D2 1065 st1.8 {$A4-$D4},[$out],#64
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