Searched refs:DAVINCI_PLL_CNTRL0_BASE (Results 1 – 3 of 3) sorted by relevance
127 if (pllbase == (volatile void *)DAVINCI_PLL_CNTRL0_BASE) in pll_prediv()142 if (pllbase == (volatile void *)DAVINCI_PLL_CNTRL0_BASE) in pll_postdiv()173 return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000; in davinci_arm_clk_get()180 return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, div) * 1000000; in davinci_clk_get()186 unsigned int pllbase = DAVINCI_PLL_CNTRL0_BASE; in set_cpu_clk_info()194 pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV); in set_cpu_clk_info()201 pllbase = DAVINCI_PLL_CNTRL0_BASE; in set_cpu_clk_info()
50 #define DAVINCI_PLL_CNTRL0_BASE (0x01c40800) macro118 #define DAVINCI_PLL_CNTRL0_BASE 0x01c11000 macro425 #define davinci_pllc0_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL0_BASE)
74 #define dv_pll0_regs ((struct dv_pll_regs *)DAVINCI_PLL_CNTRL0_BASE)