| /external/v8/src/arm64/ |
| D | constants-arm64.h | 764 DCPS2 = ExceptionFixed | 0x00A00002, enumerator
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| D | disasm-arm64.cc | 1290 case DCPS2: mnemonic = "dcps2"; form = "{'IDebug}"; break; in VisitException()
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| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 747 DCPS2 = ExceptionFixed | 0x00A00002, enumerator
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| D | disasm-aarch64.cc | 2162 case DCPS2: in VisitException()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedFalkorDetails.td | 1246 def : InstRW<[FalkorWr_1none_0cyc], (instrs BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, ISB, SMC, S…
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| D | AArch64SchedKryoDetails.td | 478 (instrs BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, ISB, HINT, SMC, SVC)>;
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| D | AArch64InstrInfo.td | 1484 def DCPS2 : ExceptionGeneration<0b101, 0b10, "dcps2">;
1493 def : InstAlias<"dcps2", (DCPS2 0)>;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedKryoDetails.td | 478 (instrs BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, ISB, HINT, SMC, SVC)>;
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| D | AArch64InstrInfo.td | 1277 def DCPS2 : ExceptionGeneration<0b101, 0b10, "dcps2">;
1286 def : InstAlias<"dcps2", (DCPS2 0)>;
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| /external/capstone/arch/AArch64/ |
| D | AArch64GenAsmWriter.inc | 286 20889U, // DCPS2
2678 0U, // DCPS2
5230 // BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, SMC, SVC
7781 // (DCPS2 0)
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| D | AArch64GenDisassemblerTables.inc | 7213 /* 30186 */ MCD_OPC_Decode, 141, 2, 213, 1, // Opcode: DCPS2
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenMCCodeEmitter.inc | 700 UINT64_C(3567255554), // DCPS2
11884 case AArch64::DCPS2:
12752 0, // DCPS2 = 687
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| D | AArch64GenAsmWriter.inc | 1499 74194U, // DCPS2
6018 0U, // DCPS2
9901 // BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, SMC, SVC
13895 case AArch64::DCPS2:
13899 // (DCPS2 0)
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| D | AArch64GenAsmWriter1.inc | 2448 147547U, // DCPS2
6967 0U, // DCPS2
10850 // BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, SMC, SVC
14583 case AArch64::DCPS2:
14587 // (DCPS2 0)
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| D | AArch64GenAsmMatcher.inc | 12646 { 823 /* dcps2 */, AArch64::DCPS2, Convert__imm_95_0, 0, { }, },
12647 { 823 /* dcps2 */, AArch64::DCPS2, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, },
19115 { 823 /* dcps2 */, AArch64::DCPS2, Convert__imm_95_0, 0, { }, },
19116 { 823 /* dcps2 */, AArch64::DCPS2, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, },
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| D | AArch64GenInstrInfo.inc | 702 DCPS2 = 687,
6589 …UnmodeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #687 = DCPS2
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| D | AArch64GenDisassemblerTables.inc | 14068 /* 68776 */ MCD::OPC_Decode, 175, 5, 245, 2, // Opcode: DCPS2
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