Searched refs:DDR_TIMING_REG (Results 1 – 2 of 2) sorted by relevance
168 #define DDR_TIMING_REG 0x142c macro
626 DDR_TIMING_REG, 0x28 << 9, 0x3f << 9)); in hws_ddr3_tip_init_controller()629 DDR_TIMING_REG, 0xa << 21, 0xff << 21)); in hws_ddr3_tip_init_controller()1818 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, DDR_TIMING_REG, in ddr3_tip_set_timing()