Searched refs:DEBUG_INIT_C (Results 1 – 7 of 7) sorted by relevance
| /external/u-boot/drivers/ddr/marvell/axp/ |
| D | ddr3_init.c | 301 DEBUG_INIT_C("DDR3 Training Error: HW Failure 0x", status, 8); in ddr3_init()
417 DEBUG_INIT_C("target_freq", target_freq, 2); in ddr3_init_main()
418 DEBUG_INIT_C("fab_opt", fab_opt, 2); in ddr3_init_main()
419 DEBUG_INIT_C("cpu_freq", cpu_freq, 2); in ddr3_init_main()
421 DEBUG_INIT_C("hclk_time_ps", hclk_time_ps, 2); in ddr3_init_main()
422 DEBUG_INIT_C("fab_opt", fab_opt, 2); in ddr3_init_main()
423 DEBUG_INIT_C("cpu_freq", cpu_freq, 2); in ddr3_init_main()
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| D | ddr3_spd.c | 482 DEBUG_INIT_C("DDR3 Training Sequence - Registered DIMM vendor ID 0x", in ddr3_spd_init()
621 DEBUG_INIT_C("DDR3 Training Sequence - Number of DIMMs detected: ",
647 DEBUG_INIT_C("DDR3 Training Sequence - Number of CS exceed limit - ",
682 DEBUG_INIT_C("DDR3 Training Sequence - Number of enabled CS exceed limit - ",
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| D | ddr3_init.h | 49 #define DEBUG_INIT_C(s, d, l) \ macro
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| /external/u-boot/arch/arm/mach-mvebu/serdes/axp/ |
| D | high_speed_env_lib.c | 447 DEBUG_INIT_C in serdes_phy_config()
1265 DEBUG_INIT_C(": change width to X", in serdes_phy_config()
1454 DEBUG_INIT_C("pex_cfg_read: ERR. device number illigal ", dev, in pex_cfg_read()
1460 DEBUG_INIT_C("pex_cfg_read: ERR. function num illigal ", func, in pex_cfg_read()
1466 DEBUG_INIT_C("pex_cfg_read: ERR. bus number illigal ", bus, 1); in pex_cfg_read()
1564 DEBUG_INIT_C("pex_local_bus_num_set: ERR. bus number illigal %d\n", in pex_local_bus_num_set()
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| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | ddr_ml_wrapper.h | 58 #define DEBUG_INIT_C(s, d, l) \ macro
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| D | mv_ddr_plat.c | 992 DEBUG_INIT_C("Error: Wrong device size of Cs: ", cs, 1); in ddr3_get_device_size()
1015 DEBUG_INIT_C("Error: Wrong Memory size of Cs: ", cs, 1); in ddr3_calc_mem_cs_size()
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| /external/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
| D | ctrl_pex.c | 234 DEBUG_INIT_C("pex_local_bus_num_set: Illegal bus number %d\n", in pex_local_bus_num_set()
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