Searched refs:DEBUG_INIT_D (Results 1 – 5 of 5) sorted by relevance
/external/u-boot/drivers/ddr/marvell/a38x/ |
D | ddr_ml_wrapper.h | 28 #define DEBUG_INIT_D(d, l) printf("%x", d) macro 32 #define DEBUG_INIT_D(d, l) macro 41 { DEBUG_INIT_S("Write Reg: 0x"); DEBUG_INIT_D((reg), 8); \ 42 DEBUG_INIT_S("= "); DEBUG_INIT_D((val), 8); DEBUG_INIT_S("\n"); } 44 { DEBUG_INIT_S("Read Reg: 0x"); DEBUG_INIT_D((reg), 8); \ 45 DEBUG_INIT_S("= "); DEBUG_INIT_D((val), 8); DEBUG_INIT_S("\n"); } 59 { DEBUG_INIT_S(s); DEBUG_INIT_D(d, l); DEBUG_INIT_S("\n"); }
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/external/u-boot/drivers/ddr/marvell/axp/ |
D | ddr3_init.h | 21 #define DEBUG_INIT_D(d, l) printf("%x", d) macro 25 #define DEBUG_INIT_D(d, l) macro 34 { DEBUG_INIT_S("Write Reg: 0x"); DEBUG_INIT_D((reg), 8); \ 35 DEBUG_INIT_S("= "); DEBUG_INIT_D((val), 8); DEBUG_INIT_S("\n"); } 37 { DEBUG_INIT_S("Read Reg: 0x"); DEBUG_INIT_D((reg), 8); \ 38 DEBUG_INIT_S("= "); DEBUG_INIT_D((val), 8); DEBUG_INIT_S("\n"); } 50 { DEBUG_INIT_S(s); DEBUG_INIT_D(d, l); DEBUG_INIT_S("\n"); }
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/external/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
D | ctrl_pex.c | 117 DEBUG_INIT_D(pex_idx, 1); in hws_pex_config() 166 DEBUG_INIT_D(pex_idx, 1); in hws_pex_config() 192 DEBUG_INIT_D(pex_idx, 1); in hws_pex_config()
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D | high_speed_env_spec.c | 1375 DEBUG_INIT_D(hws_get_physical_serdes_num(lane_num), 1); in print_topology_details() 1377 DEBUG_INIT_D(serdes_map[lane_num].serdes_speed, 2); in print_topology_details()
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/external/u-boot/arch/arm/mach-mvebu/serdes/axp/ |
D | high_speed_env_lib.c | 1264 DEBUG_INIT_D(pex_if, 1); in serdes_phy_config()
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