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Searched refs:DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_plat.h51 #define DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ 0 macro
Dmv_ddr_plat.c397 DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ) { in mv_ddr_sar_freq_get()
491 DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ) { in ddr3_tip_a38x_get_medium_freq()
757 DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ) in ddr3_tip_a38x_set_divider()