Searched refs:DOUT_SCLK_BUS0_PLL (Results 1 – 3 of 3) sorted by relevance
15 #define DOUT_SCLK_BUS0_PLL 2 macro
36 clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
72 case DOUT_SCLK_BUS0_PLL: in exynos7420_topc_get_rate()