Searched refs:DP83848_CTL_REG (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/arch/arm/mach-davinci/ |
| D | dp83848.c | 86 if (!davinci_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp)) in dp83848_auto_negotiate()
92 davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); in dp83848_auto_negotiate()
104 if (!davinci_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp)) in dp83848_auto_negotiate()
108 davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); in dp83848_auto_negotiate()
112 davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); in dp83848_auto_negotiate()
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| /external/u-boot/include/ |
| D | dp83848.h | 12 #define DP83848_CTL_REG 0x0 /* Basic Mode Control Reg */ macro
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