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Searched refs:DP_LANE_CNT_4 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/drivers/video/exynos/
Dexynos_dp.c228 temp == DP_LANE_CNT_4) { in exynos_dp_handle_edid()
387 unsigned char lane_stat[DP_LANE_CNT_4] = {0,}; in exynos_dp_read_dpcd_lane_stat()
388 unsigned char shift_val[DP_LANE_CNT_4] = {0,}; in exynos_dp_read_dpcd_lane_stat()
421 unsigned char shift_val[DP_LANE_CNT_4] = {0, 4, 0, 4}; in exynos_dp_read_dpcd_adj_req()
488 unsigned char lt_ctl_val[DP_LANE_CNT_4] = {0, }; in exynos_dp_process_clock_recovery()
598 unsigned char lt_ctl_val[DP_LANE_CNT_4] = {0,}; in exynos_dp_process_equalizer_training()
Dexynos_dp_lowlevel.c875 (count == DP_LANE_CNT_4)) in exynos_dp_set_lane_count()
887 unsigned int reg_list[DP_LANE_CNT_4] = { in exynos_dp_get_lanex_pre_emphasis()
901 unsigned int reg_list[DP_LANE_CNT_4] = { in exynos_dp_set_lanex_pre_emphasis()
916 unsigned int reg_list[DP_LANE_CNT_4] = { in exynos_dp_set_lane_pre_emphasis()
922 unsigned int reg_shift[DP_LANE_CNT_4] = { in exynos_dp_set_lane_pre_emphasis()
/external/u-boot/arch/arm/mach-exynos/include/mach/
Ddp_info.h123 DP_LANE_CNT_4 = 4, enumerator