/external/libdrm/intel/ |
D | intel_bufmgr.c | 152 drm_clip_rect_t * cliprects, int num_cliprects, int DR4) in drm_intel_bo_exec() argument 154 return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4); in drm_intel_bo_exec() 159 drm_clip_rect_t *cliprects, int num_cliprects, int DR4, in drm_intel_bo_mrb_exec() argument 164 cliprects, num_cliprects, DR4, in drm_intel_bo_mrb_exec() 171 cliprects, num_cliprects, DR4); in drm_intel_bo_mrb_exec()
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D | intel_bufmgr_priv.h | 200 int DR4); 207 int DR4, unsigned flags);
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D | intel_bufmgr.h | 145 struct drm_clip_rect *cliprects, int num_cliprects, int DR4); 147 struct drm_clip_rect *cliprects, int num_cliprects, int DR4,
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D | intel_bufmgr_gem.c | 2290 drm_clip_rect_t * cliprects, int num_cliprects, int DR4) in drm_intel_gem_bo_exec() argument 2316 execbuf.DR4 = DR4; in drm_intel_gem_bo_exec() 2357 drm_clip_rect_t *cliprects, int num_cliprects, int DR4, in do_exec2() argument 2406 execbuf.DR4 = DR4; in do_exec2() 2467 int DR4) in drm_intel_gem_bo_exec2() argument 2469 return do_exec2(bo, used, NULL, cliprects, num_cliprects, DR4, in drm_intel_gem_bo_exec2() 2475 drm_clip_rect_t *cliprects, int num_cliprects, int DR4, in drm_intel_gem_bo_mrb_exec2() argument 2478 return do_exec2(bo, used, NULL, cliprects, num_cliprects, DR4, in drm_intel_gem_bo_mrb_exec2()
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D | intel_bufmgr_fake.c | 1427 drm_clip_rect_t * cliprects, int num_cliprects, int DR4) in drm_intel_fake_bo_exec() argument 1471 batch.DR4 = DR4; in drm_intel_fake_bo_exec()
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/external/mesa3d/include/drm-uapi/ |
D | i915_drm.h | 346 int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ member 358 int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ member 792 __u32 DR4; member 895 __u32 DR4; member
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/external/libdrm/include/drm/ |
D | i915_drm.h | 388 int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ member 400 int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ member 834 __u32 DR4; member 937 __u32 DR4; member
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/external/kernel-headers/original/uapi/drm/ |
D | i915_drm.h | 388 int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ member 400 int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ member 864 __u32 DR4; member 967 __u32 DR4; member
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/external/swiftshader/third_party/LLVM/lib/Target/X86/AsmParser/ |
D | X86AsmLexer.cpp | 112 case '4': RegNo = X86::DR4; break; in LexTokenATT()
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D | X86AsmParser.cpp | 468 case '4': RegNo = X86::DR4; break; in ParseRegister()
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/external/llvm/test/CodeGen/X86/ |
D | ipra-reg-usage.ll | 6 … CR3 CR4 CR5 CR6 CR7 CR8 CR9 CR10 CR11 CR12 CR13 CR14 CR15 DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DR8 DR9…
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/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
D | X86DisassemblerDecoder.h | 255 ENTRY(DR4) \
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/external/capstone/arch/X86/ |
D | X86DisassemblerDecoder.h | 355 ENTRY(DR4) \
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/external/llvm/lib/Target/X86/Disassembler/ |
D | X86DisassemblerDecoder.h | 341 ENTRY(DR4) \
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/Disassembler/ |
D | X86DisassemblerDecoder.h | 341 ENTRY(DR4) \
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/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
D | X86MCTargetDesc.cpp | 215 case X86::CR4: case X86::CR12: case X86::DR4: return 4; in getX86RegNum()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86GenRegisterInfo.inc | 56 DR4 = 37, 285 const unsigned DR4_Overlaps[] = { X86::DR4, 0 }; 602 { "DR4", DR4_Overlaps, Empty_SubRegsSet, Empty_SuperRegsSet }, 910 X86::DR0, X86::DR1, X86::DR2, X86::DR3, X86::DR4, X86::DR5, X86::DR6, X86::DR7, 1469 RI->mapLLVMRegToDwarfReg(X86::DR4, -1, false ); 1630 RI->mapLLVMRegToDwarfReg(X86::DR4, -1, false ); 1791 RI->mapLLVMRegToDwarfReg(X86::DR4, -1, false ); 1957 RI->mapLLVMRegToDwarfReg(X86::DR4, -1, true ); 2118 RI->mapLLVMRegToDwarfReg(X86::DR4, -1, true ); 2279 RI->mapLLVMRegToDwarfReg(X86::DR4, -1, true ); [all …]
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D | X86RegisterInfo.td | 242 def DR4 : Register<"dr4">;
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/external/mesa3d/src/intel/vulkan/ |
D | anv_queue.c | 95 execbuf.DR4 = 0; in anv_device_submit_simple_batch()
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D | anv_batch_chain.c | 1377 .DR4 = 0, in setup_execbuf_for_cmd_buffer()
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 270 def DR4 : X86Reg<"dr4", 4>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 319 def DR4 : X86Reg<"dr4", 4>;
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 133 #define DR4 dr4 macro 195 #define DR4 %db4 macro
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/external/llvm/lib/Target/X86/AsmParser/ |
D | X86AsmParser.cpp | 967 case '4': RegNo = X86::DR4; break; in ParseRegister()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/AsmParser/ |
D | X86AsmParser.cpp | 1156 case '4': RegNo = X86::DR4; break; in ParseRegister()
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