Searched refs:DR5 (Results 1 – 22 of 22) sorted by relevance
| /external/clang/test/SemaCXX/ |
| D | copy-initialization.cpp | 49 namespace DR5 { namespace
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/AsmParser/ |
| D | X86AsmLexer.cpp | 113 case '5': RegNo = X86::DR5; break; in LexTokenATT()
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| D | X86AsmParser.cpp | 469 case '5': RegNo = X86::DR5; break; in ParseRegister()
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| /external/llvm/test/CodeGen/X86/ |
| D | ipra-reg-usage.ll | 6 … CR4 CR5 CR6 CR7 CR8 CR9 CR10 CR11 CR12 CR13 CR14 CR15 DR0 DR1 DR2 DR3 DR4 DR5 DR6 DR7 DR8 DR9 DR1…
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 256 ENTRY(DR5) \
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| /external/capstone/arch/X86/ |
| D | X86DisassemblerDecoder.h | 356 ENTRY(DR5) \
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 342 ENTRY(DR5) \
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 342 ENTRY(DR5) \
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 216 case X86::CR5: case X86::CR13: case X86::DR5: return 5; in getX86RegNum()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 57 DR5 = 38,
286 const unsigned DR5_Overlaps[] = { X86::DR5, 0 };
603 { "DR5", DR5_Overlaps, Empty_SubRegsSet, Empty_SuperRegsSet },
910 X86::DR0, X86::DR1, X86::DR2, X86::DR3, X86::DR4, X86::DR5, X86::DR6, X86::DR7,
1470 RI->mapLLVMRegToDwarfReg(X86::DR5, -1, false );
1631 RI->mapLLVMRegToDwarfReg(X86::DR5, -1, false );
1792 RI->mapLLVMRegToDwarfReg(X86::DR5, -1, false );
1958 RI->mapLLVMRegToDwarfReg(X86::DR5, -1, true );
2119 RI->mapLLVMRegToDwarfReg(X86::DR5, -1, true );
2280 RI->mapLLVMRegToDwarfReg(X86::DR5, -1, true );
[all …]
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| D | X86RegisterInfo.td | 243 def DR5 : Register<"dr5">;
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| D | X86GenAsmWriter.inc | 6888 case X86::DR5:
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| D | X86GenAsmWriter1.inc | 7631 case X86::DR5:
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| D | X86GenAsmMatcher.inc | 2759 case X86::DR5: OpKind = MCK_DEBUG_REG; break;
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 271 def DR5 : X86Reg<"dr5", 5>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 320 def DR5 : X86Reg<"dr5", 5>;
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 134 #define DR5 dr5 macro
196 #define DR5 %db5 macro
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 968 case '5': RegNo = X86::DR5; break; in ParseRegister()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 1157 case '5': RegNo = X86::DR5; break; in ParseRegister()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 110 DR5 = 90,
1148 { X86::DR5 },
1502 …X86::DR0, X86::DR1, X86::DR2, X86::DR3, X86::DR4, X86::DR5, X86::DR6, X86::DR7, X86::DR8, X86::DR9…
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| D | X86GenAsmMatcher.inc | 6258 case X86::DR5: OpKind = MCK_DEBUG_REG; break;
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| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | cd92a9e8c5d859c4426c55c87404a695.00020000.honggfuzz.cov | 197 k�ge\X����H�%�XN="t�a����@s;�-������R����4�� ���\�t�DR5��,�Ac�G}�):��B��l-�XU�.��8��dj�?�d�…
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